diff mbox

[Xen-devel] xen: arm: take FIQ exceptoons to Xen not guest by setting HCR_EL2.FMO

Message ID 1402915700-15988-1-git-send-email-ian.campbell@citrix.com
State Superseded
Headers show

Commit Message

Ian Campbell June 16, 2014, 10:48 a.m. UTC
So far none of the platforms which we support use FIQ for anything, but when we
end up supporting one it would be far better to surprise Xen with them than
whatever guest happens to be running...

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
 xen/arch/arm/traps.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Stefano Stabellini June 16, 2014, 11:22 a.m. UTC | #1
On Mon, 16 Jun 2014, Ian Campbell wrote:
> So far none of the platforms which we support use FIQ for anything, but when we
> end up supporting one it would be far better to surprise Xen with them than
> whatever guest happens to be running...
> 
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>

Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

>  xen/arch/arm/traps.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index 333d5c0..88292a5 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -89,8 +89,8 @@ void __cpuinit init_traps(void)
>                   CPTR_EL2);
>  
>      /* Setup hypervisor traps */
> -    WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI|HCR_TSC|
> -                 HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2);
> +    WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_FMO|HCR_VM|
> +                 HCR_TWI|HCR_TSC|HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2);
>      isb();
>  }
>  
> -- 
> 1.7.10.4
>
Julien Grall June 16, 2014, 11:25 a.m. UTC | #2
Hi Ian,

There is small typo in the commit title:

s/exceptoons/exceptions/

On 06/16/2014 11:48 AM, Ian Campbell wrote:
> So far none of the platforms which we support use FIQ for anything, but when we
> end up supporting one it would be far better to surprise Xen with them than
> whatever guest happens to be running...

May I ask for a reference in the ARM ARM? I can't find any paragraph
stating that the FIQ is taken in guest mode if HCR.EL2.FMO is not set.

Regards,
Ian Campbell June 16, 2014, 11:26 a.m. UTC | #3
On Mon, 2014-06-16 at 12:22 +0100, Stefano Stabellini wrote:
> On Mon, 16 Jun 2014, Ian Campbell wrote:
> > So far none of the platforms which we support use FIQ for anything, but when we
> > end up supporting one it would be far better to surprise Xen with them than
> > whatever guest happens to be running...
> > 
> > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> 
> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

Thanks.

I'll obviously fix the typo in $subject as this goes in...
Ian Campbell June 16, 2014, 11:28 a.m. UTC | #4
On Mon, 2014-06-16 at 12:25 +0100, Julien Grall wrote:
> Hi Ian,
> 
> There is small typo in the commit title:
> 
> s/exceptoons/exceptions/

Spotted, thanks

> On 06/16/2014 11:48 AM, Ian Campbell wrote:
> > So far none of the platforms which we support use FIQ for anything, but when we
> > end up supporting one it would be far better to surprise Xen with them than
> > whatever guest happens to be running...
> 
> May I ask for a reference in the ARM ARM? I can't find any paragraph
> stating that the FIQ is taken in guest mode if HCR.EL2.FMO is not set.

That's pretty much the meaning of that bit, it's analogous to
HCR_EL2.IMO which does the same for regular interrupts and .AMO which
does the same for async aborts.

Ian.
Julien Grall June 16, 2014, 11:36 a.m. UTC | #5
On 06/16/2014 12:28 PM, Ian Campbell wrote:
> On Mon, 2014-06-16 at 12:25 +0100, Julien Grall wrote:
>> Hi Ian,
>>
>> There is small typo in the commit title:
>>
>> s/exceptoons/exceptions/
> 
> Spotted, thanks
> 
>> On 06/16/2014 11:48 AM, Ian Campbell wrote:
>>> So far none of the platforms which we support use FIQ for anything, but when we
>>> end up supporting one it would be far better to surprise Xen with them than
>>> whatever guest happens to be running...
>>
>> May I ask for a reference in the ARM ARM? I can't find any paragraph
>> stating that the FIQ is taken in guest mode if HCR.EL2.FMO is not set.
> 
> That's pretty much the meaning of that bit, it's analogous to
> HCR_EL2.IMO which does the same for regular interrupts and .AMO which
> does the same for async aborts.

AFAIU this bit is firstly use to change the masking of CPSR. My first
thought was about it. I had to follow multiple link before finding the
right paragraph about the routing.

Can you add a reference to B1.8.4?

Acked-by: Julien Grall <julien.grall@linaro.org>

Regards,
Ian Campbell June 16, 2014, 11:42 a.m. UTC | #6
On Mon, 2014-06-16 at 12:36 +0100, Julien Grall wrote:
> On 06/16/2014 12:28 PM, Ian Campbell wrote:
> > On Mon, 2014-06-16 at 12:25 +0100, Julien Grall wrote:
> >> Hi Ian,
> >>
> >> There is small typo in the commit title:
> >>
> >> s/exceptoons/exceptions/
> > 
> > Spotted, thanks
> > 
> >> On 06/16/2014 11:48 AM, Ian Campbell wrote:
> >>> So far none of the platforms which we support use FIQ for anything, but when we
> >>> end up supporting one it would be far better to surprise Xen with them than
> >>> whatever guest happens to be running...
> >>
> >> May I ask for a reference in the ARM ARM? I can't find any paragraph
> >> stating that the FIQ is taken in guest mode if HCR.EL2.FMO is not set.
> > 
> > That's pretty much the meaning of that bit, it's analogous to
> > HCR_EL2.IMO which does the same for regular interrupts and .AMO which
> > does the same for async aborts.
> 
> AFAIU this bit is firstly use to change the masking of CPSR. My first
> thought was about it. I had to follow multiple link before finding the
> right paragraph about the routing.
> 
> Can you add a reference to B1.8.4?

OK.

> 
> Acked-by: Julien Grall <julien.grall@linaro.org>
> 
> Regards,
>
diff mbox

Patch

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 333d5c0..88292a5 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -89,8 +89,8 @@  void __cpuinit init_traps(void)
                  CPTR_EL2);
 
     /* Setup hypervisor traps */
-    WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI|HCR_TSC|
-                 HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2);
+    WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_FMO|HCR_VM|
+                 HCR_TWI|HCR_TSC|HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2);
     isb();
 }