Message ID | 1403093816-10960-3-git-send-email-rogerq@ti.com |
---|---|
State | Superseded |
Headers | show |
Rajendra, On 06/18/2014 03:16 PM, Roger Quadros wrote: > Get rid of optional clock as that is now managed by the > AHCI platform driver. > > Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..) > is passed as the second memory resource in the device tree. > > Signed-off-by: Roger Quadros <rogerq@ti.com> > Tested-by: Roger Quadros <rogerq@ti.com> Need your Ack for this one as well. Thanks. cheers, -roger > --- > arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > index cedef6b..bc42eab 100644 > --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > @@ -1292,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = { > }; > > /* sata */ > -static struct omap_hwmod_opt_clk sata_opt_clks[] = { > - { .role = "ref_clk", .clk = "sata_ref_clk" }, > -}; > > static struct omap_hwmod dra7xx_sata_hwmod = { > .name = "sata", > @@ -1302,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = { > .clkdm_name = "l3init_clkdm", > .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, > .main_clk = "func_48m_fclk", > + .mpu_rt_idx = 1, > .prcm = { > .omap4 = { > .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET, > @@ -1309,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = { > .modulemode = MODULEMODE_SWCTRL, > }, > }, > - .opt_clks = sata_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks), > }; > > /* > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote: > Get rid of optional clock as that is now managed by the > AHCI platform driver. The optional clock info in hwmod is actually unused for a lot of other modules too. http://www.spinics.net/lists/arm-kernel/msg333025.html > > Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..) > is passed as the second memory resource in the device tree. > > Signed-off-by: Roger Quadros <rogerq@ti.com> > Tested-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Rajendra Nayak <rnayak@ti.com> > --- > arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > index cedef6b..bc42eab 100644 > --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > @@ -1292,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = { > }; > > /* sata */ > -static struct omap_hwmod_opt_clk sata_opt_clks[] = { > - { .role = "ref_clk", .clk = "sata_ref_clk" }, > -}; > > static struct omap_hwmod dra7xx_sata_hwmod = { > .name = "sata", > @@ -1302,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = { > .clkdm_name = "l3init_clkdm", > .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, > .main_clk = "func_48m_fclk", > + .mpu_rt_idx = 1, > .prcm = { > .omap4 = { > .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET, > @@ -1309,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = { > .modulemode = MODULEMODE_SWCTRL, > }, > }, > - .opt_clks = sata_opt_clks, > - .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks), > }; > > /* > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index cedef6b..bc42eab 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1292,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = { }; /* sata */ -static struct omap_hwmod_opt_clk sata_opt_clks[] = { - { .role = "ref_clk", .clk = "sata_ref_clk" }, -}; static struct omap_hwmod dra7xx_sata_hwmod = { .name = "sata", @@ -1302,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = { .clkdm_name = "l3init_clkdm", .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .main_clk = "func_48m_fclk", + .mpu_rt_idx = 1, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET, @@ -1309,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .opt_clks = sata_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks), }; /*