diff mbox series

[v2,6/6] dt-bindings: crypto: qcom-qce: Add v5.4 to binding

Message ID 20201119155233.3974286-7-thara.gopinath@linaro.org
State New
Headers show
Series Enable Qualcomm Crypto Engine on sdm845 | expand

Commit Message

Thara Gopinath Nov. 19, 2020, 3:52 p.m. UTC
Add compatible string to support v5.4 crypto engine.

Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 Documentation/devicetree/bindings/crypto/qcom-qce.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Rob Herring Dec. 7, 2020, 10:09 p.m. UTC | #1
On Thu, Nov 19, 2020 at 10:52:33AM -0500, Thara Gopinath wrote:
> Add compatible string to support v5.4 crypto engine.

> 

> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>

> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---

>  Documentation/devicetree/bindings/crypto/qcom-qce.txt | 4 +++-

>  1 file changed, 3 insertions(+), 1 deletion(-)

> 

> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt

> index fdd53b184ba8..ed1ede9c0acc 100644

> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.txt

> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.txt

> @@ -2,7 +2,9 @@ Qualcomm crypto engine driver

>  

>  Required properties:

>  

> -- compatible  : should be "qcom,crypto-v5.1"

> +- compatible  : should be

> +		"qcom,crypto-v5.1" for ipq6018

> +		"qcom,crypto-v5.4" for sdm845


An outstanding example of why to use SoC specific compatibles rather 
than versions. Keep v5.1, but use SoC compatibles going forward.

>  - reg         : specifies base physical address and size of the registers map

>  - clocks      : phandle to clock-controller plus clock-specifier pair

>  - clock-names : "iface" clocks register interface

> -- 

> 2.25.1

>
Thara Gopinath Dec. 12, 2020, 3:25 p.m. UTC | #2
On 12/7/20 5:09 PM, Rob Herring wrote:
> On Thu, Nov 19, 2020 at 10:52:33AM -0500, Thara Gopinath wrote:

>> Add compatible string to support v5.4 crypto engine.

>>

>> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>

>> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

>> ---

>>   Documentation/devicetree/bindings/crypto/qcom-qce.txt | 4 +++-

>>   1 file changed, 3 insertions(+), 1 deletion(-)

>>

>> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt

>> index fdd53b184ba8..ed1ede9c0acc 100644

>> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.txt

>> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.txt

>> @@ -2,7 +2,9 @@ Qualcomm crypto engine driver

>>   

>>   Required properties:

>>   

>> -- compatible  : should be "qcom,crypto-v5.1"

>> +- compatible  : should be

>> +		"qcom,crypto-v5.1" for ipq6018

>> +		"qcom,crypto-v5.4" for sdm845

> 

> An outstanding example of why to use SoC specific compatibles rather

> than versions. Keep v5.1, but use SoC compatibles going forward.


Hi Rob,

Thanks for the review. We have different Soc's using the same version of
the ip. Is it okay to have "qcom,sdm845-crypto", "qcom,crypto-v5.4" amd 
have only "qcom,crypto-<version>" in the driver ?

> 

>>   - reg         : specifies base physical address and size of the registers map

>>   - clocks      : phandle to clock-controller plus clock-specifier pair

>>   - clock-names : "iface" clocks register interface

>> -- 

>> 2.25.1

>>


-- 
Warm Regards
Thara
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt
index fdd53b184ba8..ed1ede9c0acc 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.txt
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.txt
@@ -2,7 +2,9 @@  Qualcomm crypto engine driver
 
 Required properties:
 
-- compatible  : should be "qcom,crypto-v5.1"
+- compatible  : should be
+		"qcom,crypto-v5.1" for ipq6018
+		"qcom,crypto-v5.4" for sdm845
 - reg         : specifies base physical address and size of the registers map
 - clocks      : phandle to clock-controller plus clock-specifier pair
 - clock-names : "iface" clocks register interface