[v2,08/21] dt-bindings: Document canaan,k210-rst bindings

Message ID	20201124043728.199852-9-damien.lemoal@wdc.com
State	Superseded
Headers	show Return-Path: <devicetree-owner@kernel.org> IronPort-SDR: VS/SENuz6tivSDYoIdpqtkYZMi2Bzl0nD9bChheVjadjm1gwS6qqAzxYR5j0ELoKVVLJZ7yJk8 AfVjdJ9ExGCmGSW6wDzM2vl3G8/fu/WYmSgEEv4O/RBFmOCc5AVdtlulHObfldsKGjR43wikcf i2y7wi4tPHk/qADUgOBd8jbdRisE83b/y4H+UWl82NU1cPGd0RaEtlewGUQ5OKl6tRVgU9gkOq uxEleUNhEO6K9aa8EXTaM8NY5B1aCFPrkkTSf7XdAWvi2WUHYhXCz/jJ8kUtT6XbPi5O4+B+Sl Twc= IronPort-SDR: YflpDCFetfHqf5+NLFr9GHoGbgPz5BuE86Ss8b9Ag767l1aNaewa+dn8a2Yejx+xt6ZTLdLgoT 9gAOWPvhQhH87uSwHquw1ThEDaBQ9aeJU= IronPort-SDR: F5fVr50SlB7QRLrzq/VnNQyH7KQ+mbrTSrqO+1qHo4a1ELKwOzxE7LezcZ+nX7A2v0aYJ4/pWm py7q1U+o+2kg== WDCIronportException: Internal From: Damien Le Moal <damien.lemoal@wdc.com> To: Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>, linux-clk@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org, Philipp Zabel <p.zabel@pengutronix.de> Cc: Sean Anderson <seanga2@gmail.com> Subject: [PATCH v2 08/21] dt-bindings: Document canaan,k210-rst bindings Date: Tue, 24 Nov 2020 13:37:15 +0900 Message-Id: <20201124043728.199852-9-damien.lemoal@wdc.com> In-Reply-To: <20201124043728.199852-1-damien.lemoal@wdc.com> References: <20201124043728.199852-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	RISC-V Kendryte K210 support improvements \| expand [v2,00/21] RISC-V Kendryte K210 support improvements [v2,01/21] riscv: Fix kernel time_init() [v2,02/21] riscv: Fix sifive serial driver [v2,03/21] riscv: Enable interrupts during syscalls with M-Mode [v2,04/21] riscv: Fix builtin DTB handling [v2,05/21] riscv: Use vendor name for K210 SoC support [v2,06/21] dt-bindings: Add Canaan vendor prefix [v2,07/21] dt-binding: Document canaan,k210-clk bindings [v2,08/21] dt-bindings: Document canaan,k210-rst bindings [v2,09/21] dt-bindings: Document canaan,k210-fpioa bindings [v2,10/21] dt-binding: Document canaan,k210-sysctl bindings [v2,11/21] riscv: Add Canaan Kendryte K210 clock driver [v2,12/21] riscv: Add Canaan Kendryte K210 FPIOA driver [v2,13/21] riscv: Add Canaan Kendryte K210 reset controller [v2,14/21] riscv: Update Kendryte K210 device tree [v2,15/21] riscv: Add SiPeed MAIX BiT board device tree [v2,16/21] riscv: Add SiPeed MAIX DOCK board device tree [v2,17/21] riscv: Add SiPeed MAIX GO board device tree [v2,18/21] riscv: Add SiPeed MAIXDUINO board device tree [v2,19/21] riscv: Add Kendryte KD233 board device tree [v2,20/21] riscv: Update Canaan Kendryte K210 defconfig [v2,21/21] riscv: Add Canaan Kendryte K210 SD card defconfig

Message ID

20201124043728.199852-9-damien.lemoal@wdc.com

State

Superseded

Headers

IronPort-SDR: VS/SENuz6tivSDYoIdpqtkYZMi2Bzl0nD9bChheVjadjm1gwS6qqAzxYR5j0ELoKVVLJZ7yJk8
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	py7q1U+o+2kg==
WDCIronportException: Internal
From: Damien Le Moal <damien.lemoal@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>,
	linux-gpio@vger.kernel.org, Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sean Anderson <seanga2@gmail.com>
Subject: [PATCH v2 08/21] dt-bindings: Document canaan,k210-rst bindings
Date: Tue, 24 Nov 2020 13:37:15 +0900
Message-Id: <20201124043728.199852-9-damien.lemoal@wdc.com>
In-Reply-To: <20201124043728.199852-1-damien.lemoal@wdc.com>
References: <20201124043728.199852-1-damien.lemoal@wdc.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

RISC-V Kendryte K210 support improvements | expand

Commit Message

Damien Le Moal Nov. 24, 2020, 4:37 a.m. UTC

Document the device tree bindings for the Canaan Kendryte K210 SoC
reset controller driver in
Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header
file include/dt-bindings/reset/k210-rst.h is added to define all
possible reset lines of the SoC.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 .../bindings/reset/canaan,k210-rst.yaml       | 40 ++++++++++++++++++
 include/dt-bindings/reset/k210-rst.h          | 42 +++++++++++++++++++
 2 files changed, 82 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml
 create mode 100644 include/dt-bindings/reset/k210-rst.h

diff --git a/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml
new file mode 100644
index 000000000000..53e4ede9c0bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml
@@ -0,0 +1,40 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Canaan Kendryte K210 Reset Controller Device Tree Bindings
+
+maintainers:
+  - Damien Le Moal <damien.lemoal@wdc.com>
+
+description: |
+  Canaan Kendryte K210 reset controller driver which supports the SoC
+  system controller supplied reset registers for the various peripherals
+  of the SoC. The K210 reset controller node must be defined as a child
+  node of the K210 system controller node.
+
+  See also:
+  - dt-bindings/reset/k210-rst.h
+
+properties:
+  compatible:
+    const: canaan,k210-rst
+
+  '#reset-cells':
+    const: 1
+
+required:
+  - '#reset-cells'
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/reset/k210-rst.h>
+    sysrst: reset-controller {
+      compatible = "canaan,k210-rst";
+      #reset-cells = <1>;
+    };
diff --git a/include/dt-bindings/reset/k210-rst.h b/include/dt-bindings/reset/k210-rst.h
new file mode 100644
index 000000000000..883c1aed50e8
--- /dev/null
+++ b/include/dt-bindings/reset/k210-rst.h
@@ -0,0 +1,42 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ */
+#ifndef RESET_K210_SYSCTL_H
+#define RESET_K210_SYSCTL_H
+
+/*
+ * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits.
+ * Taken from Kendryte SDK (kendryte-standalone-sdk).
+ */
+#define K210_RST_ROM	0
+#define K210_RST_DMA	1
+#define K210_RST_AI	2
+#define K210_RST_DVP	3
+#define K210_RST_FFT	4
+#define K210_RST_GPIO	5
+#define K210_RST_SPI0	6
+#define K210_RST_SPI1	7
+#define K210_RST_SPI2	8
+#define K210_RST_SPI3	9
+#define K210_RST_I2S0	10
+#define K210_RST_I2S1	11
+#define K210_RST_I2S2	12
+#define K210_RST_I2C0	13
+#define K210_RST_I2C1	14
+#define K210_RST_I2C2	15
+#define K210_RST_UART1	16
+#define K210_RST_UART2	17
+#define K210_RST_UART3	18
+#define K210_RST_AES	19
+#define K210_RST_FPIOA	20
+#define K210_RST_TIMER0	21
+#define K210_RST_TIMER1	22
+#define K210_RST_TIMER2	23
+#define K210_RST_WDT0	24
+#define K210_RST_WDT1	25
+#define K210_RST_SHA	26
+#define K210_RST_RTC	29
+
+#endif /* RESET_K210_SYSCTL_H */

[v2,08/21] dt-bindings: Document canaan,k210-rst bindings

Commit Message

Patch