| Message ID | 20201128142839.517949-12-paul.kocialkowski@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | Allwinner MIPI CSI-2 support for A31/V3s/A83T | expand |
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 51cc30e84e26..1e1f0d2097d5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -1109,6 +1109,15 @@ csi: csi@1cb0000 { pinctrl-names = "default"; pinctrl-0 = <&csi_pins>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi_in_parallel: port@0 { + reg = <0>; + }; + }; }; dsi: dsi@1ca0000 {
Since the CSI controller binding is getting a bit more complex due to the addition of MIPI CSI-2 bridge support, make the ports node explicit with the parallel port. This way, it's clear that the controller only supports parallel interface input and there's no confusion about the port number. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)