From patchwork Fri Aug 12 08:27:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 3405 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5FD3023F4D for ; Fri, 12 Aug 2011 08:28:05 +0000 (UTC) Received: from mail-qy0-f173.google.com (mail-qy0-f173.google.com [209.85.216.173]) by fiordland.canonical.com (Postfix) with ESMTP id 2835DA18753 for ; Fri, 12 Aug 2011 08:28:05 +0000 (UTC) Received: by qyk31 with SMTP id 31so247552qyk.11 for ; Fri, 12 Aug 2011 01:28:04 -0700 (PDT) Received: by 10.229.62.150 with SMTP id x22mr428124qch.136.1313137684642; Fri, 12 Aug 2011 01:28:04 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.229.190.71 with SMTP id dh7cs141433qcb; Fri, 12 Aug 2011 01:28:04 -0700 (PDT) Received: from mr.google.com ([10.213.107.17]) by 10.213.107.17 with SMTP id z17mr560930ebo.49.1313137684251 (num_hops = 1); Fri, 12 Aug 2011 01:28:04 -0700 (PDT) Received: by 10.213.107.17 with SMTP id z17mr427387ebo.49.1313137683703; Fri, 12 Aug 2011 01:28:03 -0700 (PDT) Received: from eu1sys200aog104.obsmtp.com (eu1sys200aog104.obsmtp.com [207.126.144.117]) by mx.google.com with SMTP id q11si1993823eef.185.2011.08.12.01.27.57 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 12 Aug 2011 01:28:03 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.117 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.117; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.117 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob104.postini.com ([207.126.147.11]) with SMTP ID DSNKTkTkDaaYwJXXo6iaVy1Y4T//zFzEf+ro@postini.com; Fri, 12 Aug 2011 08:28:03 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 7DEFF135; Fri, 12 Aug 2011 08:27:54 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 25966170; Fri, 12 Aug 2011 08:27:54 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 8B1DC24C2AB; Fri, 12 Aug 2011 10:27:48 +0200 (CEST) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 12 Aug 2011 10:27:53 +0200 From: Linus Walleij To: Samuel Ortiz , Cc: Lee Jones , Mattias Nilsson , Linus Walleij Subject: [PATCH 03/23] mfd/db8500-prcmu: initialize DB8500 PRCMU regs Date: Fri, 12 Aug 2011 10:27:50 +0200 Message-ID: <1313137670-30683-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Mattias Nilsson Some clocks may be force enabled when we probe the driver, but they need to be turned off by default so we have a known state. We call this the register initialization function if we need more stuff in there in the future. Signed-off-by: Mattias Nilsson Signed-off-by: Linus Walleij --- drivers/mfd/db8500-prcmu.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index dcc690e..e2c4a26 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -1840,6 +1840,16 @@ void __init prcmu_early_init(void) } } +static void __init init_prcm_registers(void) +{ + u32 val; + + val = readl(PRCM_A9PL_FORCE_CLKEN); + val &= ~(PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN | + PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN); + writel(val, (PRCM_A9PL_FORCE_CLKEN)); +} + /* * Power domain switches (ePODs) modeled as regulators for the DB8500 SoC */ @@ -2038,6 +2048,8 @@ static int __init db8500_prcmu_probe(struct platform_device *pdev) if (ux500_is_svp()) return -ENODEV; + init_prcm_registers(); + /* Clean up the mailbox interrupts after pre-kernel code. */ writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);