| Message ID | 1406734091-16202-3-git-send-email-peter.griffin@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Wed, Jul 30, 2014 at 04:28:10PM +0100, Peter Griffin wrote: > This patch documents the device tree documentation required for > the ST usb3 controller glue layer found in STiH407 devices. > > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Signed-off-by: Peter Griffin <peter.griffin@linaro.org> > Acked-by: Lee Jones <lee.jones@linaro.org> > --- > Documentation/devicetree/bindings/usb/dwc3-st.txt | 69 +++++++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/dwc3-st.txt > > diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt > new file mode 100644 > index 0000000..de3fea3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/dwc3-st.txt > @@ -0,0 +1,69 @@ > +ST DWC3 glue logic > + > +This file documents the parameters for the dwc3-st driver. > +This driver controls the glue logic used to configure the dwc3 core on > +STiH407 based platforms. > + > +Required properties: > + - compatible : must be "st,stih407-dwc3" > + - reg : glue logic base address and USB syscfg ctrl register offset > + - reg-names : should be "reg-glue" and "syscfg-reg" > + - st,syscon : should be phandle to system configuration node which > + encompasses the glue registers > + - resets : list of phandle and reset specifier pairs. There should be two entries, one > + for the powerdown and softreset lines of the usb3 IP > + - reset-names : list of reset signal names. Names should be "powerdown" and "softreset" > +See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt > +See: Documentation/devicetree/bindings/reset/reset.txt > + > + - #address-cells, #size-cells : should be '1' if the device has sub-nodes > + with 'reg' property > + > + - pinctl-names : A pinctrl state named "default" must be defined > +See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt > + > + - pinctrl-0 : Pin control group > +See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt > + > + - ranges : allows valid 1:1 translation between child's address space and > + parent's address space > + > +Sub-nodes: > +The dwc3 core should be added as subnode to ST DWC3 glue as shown in the > +example below. The DT binding details of dwc3 can be found in: > +Documentation/devicetree/bindings/usb/dwc3.txt > + > +NB: The dr_mode property described in [1] is NOT optional for this driver, as the default value > +is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are either "host" > +or "device". > + > +[1] Documentation/devicetree/bindings/usb/generic.txt > + > +Example: > + > +st_dwc3: dwc3@8f94000 { > + status = "disabled"; > + compatible = "st,stih407-dwc3"; > + reg = <0x08f94000 0x1000>, <0x110 0x4>; > + reg-names = "reg-glue", "syscfg-reg"; > + st,syscfg = <&syscfg_core>; > + resets = <&powerdown STIH407_USB3_POWERDOWN>; > + <&softreset STIH407_MIPHY2_SOFTRESET>; > + reset-names = "powerdown", > + "softreset"; > + #address-cells = <1>; > + #size-cells = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usb3>; > + ranges; > + > + dwc3: dwc3@9900000 { > + compatible = "snps,dwc3"; > + reg = <0x09900000 0x100000>; > + interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>; > + dr_mode = "host" > + usb-phy = <&usb3_phy>; > + phy-names = "usb2-phy"; > + phys = <&usb2_picophy2>; why are you using different binding for usb2 and usb3 phys ? Why can't you just: phys-names = "usb2-phy", "usb3-phy"; phys = <&usb2_picophy2>, <&usb3_phy>; ??
Hi Felipe, Thanks for reviewing, see my comments below: - On Wed, 20 Aug 2014, Felipe Balbi wrote: > > + dwc3: dwc3@9900000 { > > + compatible = "snps,dwc3"; > > + reg = <0x09900000 0x100000>; > > + interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>; > > + dr_mode = "host" > > + usb-phy = <&usb3_phy>; > > + phy-names = "usb2-phy"; > > + phys = <&usb2_picophy2>; > > why are you using different binding for usb2 and usb3 phys ? Why can't > you just: > > phys-names = "usb2-phy", "usb3-phy"; > phys = <&usb2_picophy2>, <&usb3_phy>; > > ?? Currently (in the vendor tree) one of the phys lives in drivers/usb/phy and the other in drivers/phy. I believe that is because one is only a usb phy and the other is a multi function phy which can drive PCI-E or USB3. So to make that work, when dwc3/core.c gets the PHYS in dwc3_core_get_phy() we need to use the different bindings. I think we are the only platform using "one of each", but luckily dwc3_core_get_phy() has been written generically enough that it "just works" :-). regards, Peter. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Aug 21, 2014 at 02:33:40PM +0100, Peter Griffin wrote: > Hi Felipe, > > Thanks for reviewing, see my comments below: - > > On Wed, 20 Aug 2014, Felipe Balbi wrote: > > > > + dwc3: dwc3@9900000 { > > > + compatible = "snps,dwc3"; > > > + reg = <0x09900000 0x100000>; > > > + interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>; > > > + dr_mode = "host" > > > + usb-phy = <&usb3_phy>; > > > + phy-names = "usb2-phy"; > > > + phys = <&usb2_picophy2>; > > > > why are you using different binding for usb2 and usb3 phys ? Why can't > > you just: > > > > phys-names = "usb2-phy", "usb3-phy"; > > phys = <&usb2_picophy2>, <&usb3_phy>; > > > > ?? > > Currently (in the vendor tree) one of the phys lives in > drivers/usb/phy and the other in drivers/phy. > I believe that is because one is only a usb phy and the other is a > multi function phy which can drive PCI-E or USB3. right, but for mainline, we can have both PHYs in drivers/phy only. > So to make that work, when dwc3/core.c gets the PHYS in > dwc3_core_get_phy() we need to use the different bindings. > > I think we are the only platform using "one of each", but luckily > dwc3_core_get_phy() has been written generically enough that it "just > works" :-). true, but I want to drop support for the legacy drivers/usb/phy layer from dwc3. I'll try to move all PHYs to drivers/phy for v3.18. cheers
Hi Felipe, On Thu, 21 Aug 2014, Felipe Balbi wrote: > > Currently (in the vendor tree) one of the phys lives in > > drivers/usb/phy and the other in drivers/phy. > > I believe that is because one is only a usb phy and the other is a > > multi function phy which can drive PCI-E or USB3. > > right, but for mainline, we can have both PHYs in drivers/phy only. Ah ok, I didn't know that, so thanks for that info. > > > So to make that work, when dwc3/core.c gets the PHYS in > > dwc3_core_get_phy() we need to use the different bindings. > > > > I think we are the only platform using "one of each", but luckily > > dwc3_core_get_phy() has been written generically enough that it "just > > works" :-). > > true, but I want to drop support for the legacy drivers/usb/phy layer > from dwc3. I'll try to move all PHYs to drivers/phy for v3.18. Ok, so for the next re-spin I will change this to just use the generic phy binding for both usb2 & usb3 phys. In parallel I will also migrate over the drivers/usb/phy driver to be just a generic phy before I attempt to upstream it. regards, Peter -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Peter, On Thu, Aug 21, 2014 at 03:03:47PM +0100, Peter Griffin wrote: > Hi Felipe, > > On Thu, 21 Aug 2014, Felipe Balbi wrote: > > > > Currently (in the vendor tree) one of the phys lives in > > > drivers/usb/phy and the other in drivers/phy. > > > I believe that is because one is only a usb phy and the other is a > > > multi function phy which can drive PCI-E or USB3. > > > > right, but for mainline, we can have both PHYs in drivers/phy only. > > Ah ok, I didn't know that, so thanks for that info. > > > > > So to make that work, when dwc3/core.c gets the PHYS in > > > dwc3_core_get_phy() we need to use the different bindings. > > > > > > I think we are the only platform using "one of each", but luckily > > > dwc3_core_get_phy() has been written generically enough that it "just > > > works" :-). > > > > true, but I want to drop support for the legacy drivers/usb/phy layer > > from dwc3. I'll try to move all PHYs to drivers/phy for v3.18. > > Ok, so for the next re-spin I will change this to just use the generic > phy binding for both usb2 & usb3 phys. > > In parallel I will also migrate over the drivers/usb/phy driver to be > just a generic phy before I attempt to upstream it. Thank you for understanding :-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt new file mode 100644 index 0000000..de3fea3 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/dwc3-st.txt @@ -0,0 +1,69 @@ +ST DWC3 glue logic + +This file documents the parameters for the dwc3-st driver. +This driver controls the glue logic used to configure the dwc3 core on +STiH407 based platforms. + +Required properties: + - compatible : must be "st,stih407-dwc3" + - reg : glue logic base address and USB syscfg ctrl register offset + - reg-names : should be "reg-glue" and "syscfg-reg" + - st,syscon : should be phandle to system configuration node which + encompasses the glue registers + - resets : list of phandle and reset specifier pairs. There should be two entries, one + for the powerdown and softreset lines of the usb3 IP + - reset-names : list of reset signal names. Names should be "powerdown" and "softreset" +See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt +See: Documentation/devicetree/bindings/reset/reset.txt + + - #address-cells, #size-cells : should be '1' if the device has sub-nodes + with 'reg' property + + - pinctl-names : A pinctrl state named "default" must be defined +See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt + + - pinctrl-0 : Pin control group +See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt + + - ranges : allows valid 1:1 translation between child's address space and + parent's address space + +Sub-nodes: +The dwc3 core should be added as subnode to ST DWC3 glue as shown in the +example below. The DT binding details of dwc3 can be found in: +Documentation/devicetree/bindings/usb/dwc3.txt + +NB: The dr_mode property described in [1] is NOT optional for this driver, as the default value +is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are either "host" +or "device". + +[1] Documentation/devicetree/bindings/usb/generic.txt + +Example: + +st_dwc3: dwc3@8f94000 { + status = "disabled"; + compatible = "st,stih407-dwc3"; + reg = <0x08f94000 0x1000>, <0x110 0x4>; + reg-names = "reg-glue", "syscfg-reg"; + st,syscfg = <&syscfg_core>; + resets = <&powerdown STIH407_USB3_POWERDOWN>; + <&softreset STIH407_MIPHY2_SOFTRESET>; + reset-names = "powerdown", + "softreset"; + #address-cells = <1>; + #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb3>; + ranges; + + dwc3: dwc3@9900000 { + compatible = "snps,dwc3"; + reg = <0x09900000 0x100000>; + interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>; + dr_mode = "host" + usb-phy = <&usb3_phy>; + phy-names = "usb2-phy"; + phys = <&usb2_picophy2>; + }; +};