diff mbox series

[4/4] PCI: j721e: Add support to provide refclk to PCIe connector

Message ID 20201224115658.2795-5-kishon@ti.com
State Superseded
Headers show
Series None | expand

Commit Message

Kishon Vijay Abraham I Dec. 24, 2020, 11:56 a.m. UTC
Add support to provide refclk to PCIe connector.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

---
 drivers/pci/controller/cadence/pci-j721e.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

-- 
2.17.1

Comments

Kishon Vijay Abraham I Jan. 4, 2021, 11 a.m. UTC | #1
Hi,

On 24/12/20 5:26 pm, Kishon Vijay Abraham I wrote:
> Add support to provide refclk to PCIe connector.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  drivers/pci/controller/cadence/pci-j721e.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
> index dac1ac8a7615..8ec6d9c3e164 100644
> --- a/drivers/pci/controller/cadence/pci-j721e.c
> +++ b/drivers/pci/controller/cadence/pci-j721e.c
> @@ -6,6 +6,7 @@
>   * Author: Kishon Vijay Abraham I <kishon@ti.com>
>   */
>  
> +#include <linux/clk.h>
>  #include <linux/delay.h>
>  #include <linux/gpio/consumer.h>
>  #include <linux/io.h>
> @@ -50,6 +51,7 @@ enum link_status {
>  
>  struct j721e_pcie {
>  	struct device		*dev;
> +	struct clk		*refclk;
>  	u32			mode;
>  	u32			num_lanes;
>  	struct cdns_pcie	*cdns_pcie;
> @@ -310,6 +312,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)
>  	struct cdns_pcie_ep *ep;
>  	struct gpio_desc *gpiod;
>  	void __iomem *base;
> +	struct clk *clk;
>  	u32 num_lanes;
>  	u32 mode;
>  	int ret;
> @@ -408,6 +411,19 @@ static int j721e_pcie_probe(struct platform_device *pdev)
>  			goto err_get_sync;
>  		}
>  
> +		clk = devm_clk_get_optional(dev, "pcie_refclk");
> +		if (IS_ERR(clk)) {
> +			dev_err(dev, "failed to get pcie_refclk\n");

missed initializing "ret" here. Will fix this and re-send new version.

Thanks
Kishon
diff mbox series

Patch

diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index dac1ac8a7615..8ec6d9c3e164 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -6,6 +6,7 @@ 
  * Author: Kishon Vijay Abraham I <kishon@ti.com>
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/gpio/consumer.h>
 #include <linux/io.h>
@@ -50,6 +51,7 @@  enum link_status {
 
 struct j721e_pcie {
 	struct device		*dev;
+	struct clk		*refclk;
 	u32			mode;
 	u32			num_lanes;
 	struct cdns_pcie	*cdns_pcie;
@@ -310,6 +312,7 @@  static int j721e_pcie_probe(struct platform_device *pdev)
 	struct cdns_pcie_ep *ep;
 	struct gpio_desc *gpiod;
 	void __iomem *base;
+	struct clk *clk;
 	u32 num_lanes;
 	u32 mode;
 	int ret;
@@ -408,6 +411,19 @@  static int j721e_pcie_probe(struct platform_device *pdev)
 			goto err_get_sync;
 		}
 
+		clk = devm_clk_get_optional(dev, "pcie_refclk");
+		if (IS_ERR(clk)) {
+			dev_err(dev, "failed to get pcie_refclk\n");
+			goto err_pcie_setup;
+		}
+
+		ret = clk_prepare_enable(clk);
+		if (ret) {
+			dev_err(dev, "failed to enable pcie_refclk\n");
+			goto err_get_sync;
+		}
+		pcie->refclk = clk;
+
 		/*
 		 * "Power Sequencing and Reset Signal Timings" table in
 		 * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0
@@ -476,6 +492,7 @@  static int j721e_pcie_remove(struct platform_device *pdev)
 	struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;
 	struct device *dev = &pdev->dev;
 
+	clk_disable_unprepare(pcie->refclk);
 	cdns_pcie_disable_phy(cdns_pcie);
 	pm_runtime_put(dev);
 	pm_runtime_disable(dev);