From patchwork Sun Dec 27 10:54:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 352582 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BA64C433E9 for ; Sun, 27 Dec 2020 10:57:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6ED312250F for ; Sun, 27 Dec 2020 10:57:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726386AbgL0K4u (ORCPT ); Sun, 27 Dec 2020 05:56:50 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:47773 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726363AbgL0K4t (ORCPT ); Sun, 27 Dec 2020 05:56:49 -0500 X-UUID: c10754fa78224fd397c0093f7157576d-20201227 X-UUID: c10754fa78224fd397c0093f7157576d-20201227 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 804940495; Sun, 27 Dec 2020 18:55:15 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 27 Dec 2020 18:56:17 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 27 Dec 2020 18:56:17 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd , Philipp Zabel CC: Fan Chen , HenryC Chen , YT Lee , Xiaoqing Liu , Charles Yang , Angus Lin , Mark Rutland , Nishanth Menon , Roger Lu , , , , , Subject: [PATCH v10 5/7] [v10, 5/7]: dt-bindings: soc: mediatek: add mt8192 svs dt-bindings Date: Sun, 27 Dec 2020 18:54:47 +0800 Message-ID: <20201227105449.11452-6-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201227105449.11452-1-roger.lu@mediatek.com> References: <20201227105449.11452-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Signed-off-by: Roger Lu --- .../bindings/soc/mediatek/mtk-svs.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml index 9c7da0acd82f..9310109d209a 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml @@ -22,6 +22,7 @@ properties: compatible: enum: - mediatek,mt8183-svs + - mediatek,mt8192-svs reg: description: Address range of the MTK SVS controller. @@ -47,6 +48,14 @@ properties: - const: svs-calibration-data - const: t-calibration-data + resets: + description: + svs reset control. + + reset-names: + items: + - const: svs_rst + required: - compatible - reg @@ -73,3 +82,20 @@ examples: nvmem-cells = <&svs_calibration>, <&thermal_calibration>; nvmem-cell-names = "svs-calibration-data", "t-calibration-data"; }; + + - | + #include + #include + #include + + svs: svs@1100b000 { + compatible = "mediatek,mt8192-svs"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "main"; + nvmem-cells = <&svs_calibration>, <&lvts_e_data1>; + nvmem-cell-names = "svs-calibration-data", "t-calibration-data"; + resets = <&infracfg_rst 0>; + reset-names = "svs_rst"; + };