| Message ID | 20210101180118.2496-1-olek2@wp.pl |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dt-bindings: mips: lantiq: Document Lantiq Xway CGU bindings | expand |
On Fri, 01 Jan 2021 19:01:18 +0100, Aleksander Jan Bajkowski wrote: > Document the Lantiq Xway SoC series Clock Generation Unit (CGU) bindings. > > Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> > --- > .../bindings/mips/lantiq/lantiq,cgu.yaml | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,cgu.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
On Fri, Jan 01, 2021 at 07:01:18PM +0100, Aleksander Jan Bajkowski wrote: > Document the Lantiq Xway SoC series Clock Generation Unit (CGU) bindings. > > Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> > --- > .../bindings/mips/lantiq/lantiq,cgu.yaml | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,cgu.yaml applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
(sorry for only seeing this late) [...] > +maintainers: > + - John Crispin <john@phrozen.org> personally I think we should get at least John's Acked-by but I don't know if there's any rule for adding a dt-binding for some other maintainer [...] > +required: > + - compatible > + - reg based on "DOs and DON’Ts for designing and writing Devicetree bindings" from [0] I think this is incomplete As far as I know CGU contains some PLLs. These PLLs need at least one input: the main XTAL which is found on the board Also the Lantiq code does not use the common clock framework yet. Once that's used we also need #clock-cells = <1>. I don't know if that should be added already (or not). > +examples: > + - | > + cgu@103000 { this should be clock-controller@... Best regards, Martin [0] https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-bindings.html
diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,cgu.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,cgu.yaml new file mode 100644 index 000000000000..d5805725befb --- /dev/null +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,cgu.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,cgu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq Xway SoC series Clock Generation Unit (CGU) + +maintainers: + - John Crispin <john@phrozen.org> + +properties: + compatible: + items: + - enum: + - lantiq,cgu-xway + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + };
Document the Lantiq Xway SoC series Clock Generation Unit (CGU) bindings. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> --- .../bindings/mips/lantiq/lantiq,cgu.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,cgu.yaml