[v2,12/18] ARM: dts: qcom: sdx55-mtp: Enable QPIC NAND

Message ID	20210105122649.13581-13-manivannan.sadhasivam@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Subject: [PATCH v2 12/18] ARM: dts: qcom: sdx55-mtp: Enable QPIC NAND Date: Tue, 5 Jan 2021 17:56:43 +0530 Message-Id: <20210105122649.13581-13-manivannan.sadhasivam@linaro.org> In-Reply-To: <20210105122649.13581-1-manivannan.sadhasivam@linaro.org> References: <20210105122649.13581-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Devicetree update for SDX55 platform \| expand [v2,00/18] Devicetree update for SDX55 platform [v2,01/18] ARM: dts: qcom: sdx55: Add pincontrol node [v2,02/18] ARM: dts: qcom: sdx55: Add reserved memory nodes [v2,03/18] dt-bindings: mmc: sdhci-msm: Document the SDX55 compatible [v2,04/18] ARM: dts: qcom: sdx55: Add support for SDHCI controller [v2,05/18] dt-bindings: arm-smmu: Add binding for Qcom SDX55 SMMU [v2,06/18] ARM: dts: qcom: sdx55: Enable ARM SMMU [v2,07/18] ARM: dts: qcom: sdx55: Add support for TCSR Mutex [v2,08/18] ARM: dts: qcom: sdx55: Add Shared memory manager support [v2,09/18] ARM: dts: qcom: sdx55: Add QPIC BAM support [v2,10/18] ARM: dts: qcom: sdx55: Add QPIC NAND support [v2,11/18] ARM: dts: qcom: sdx55-mtp: Enable BAM DMA [v2,12/18] ARM: dts: qcom: sdx55-mtp: Enable QPIC NAND [v2,13/18] ARM: dts: qcom: sdx55: Add spmi node [v2,14/18] ARM: dts: qcom: sdx55-mtp: Add pm8150b pmic [v2,15/18] ARM: dts: qcom: sdx55-mtp: Add pmx55 pmic [v2,16/18] ARM: dts: qcom: sdx55: Add rpmpd node [v2,17/18] ARM: dts: qcom: Add PMIC pmx55 dts [v2,18/18] ARM: dts: qcom: sdx55-mtp: Add regulator nodes

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20210105122649.13581-13-manivannan.sadhasivam@linaro.org

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Received-SPF: pass (google.com: domain of
	linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18
	as permitted sender) client-ip=23.128.96.18; 
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v2 12/18] ARM: dts: qcom: sdx55-mtp: Enable QPIC NAND
Date: Tue,  5 Jan 2021 17:56:43 +0530
Message-Id: <20210105122649.13581-13-manivannan.sadhasivam@linaro.org>
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Series

Devicetree update for SDX55 platform | expand

Enable QPIC NAND on SDX55-MTP board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm/boot/dts/qcom-sdx55-mtp.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.25.1

Comments

Vinod Koul Jan. 5, 2021, 3:51 p.m. UTC | #1

On 05-01-21, 17:56, Manivannan Sadhasivam wrote:
> Enable QPIC NAND on SDX55-MTP board.


Reviewed-by: Vinod Koul <vkoul@kernel.org>


> 

> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> ---

>  arch/arm/boot/dts/qcom-sdx55-mtp.dts | 12 ++++++++++++

>  1 file changed, 12 insertions(+)

> 

> diff --git a/arch/arm/boot/dts/qcom-sdx55-mtp.dts b/arch/arm/boot/dts/qcom-sdx55-mtp.dts

> index 74ea6f425c77..b8d432a4324c 100644

> --- a/arch/arm/boot/dts/qcom-sdx55-mtp.dts

> +++ b/arch/arm/boot/dts/qcom-sdx55-mtp.dts

> @@ -29,3 +29,15 @@ &blsp1_uart3 {

>  &qpic_bam {

>  	status = "ok";

>  };

> +

> +&qpic_nand {

> +	status = "ok";

> +

> +	nand@0 {

> +		reg = <0>;

> +

> +		nand-ecc-strength = <8>;

> +		nand-ecc-step-size = <512>;

> +		nand-bus-width = <8>;

> +	};

> +};

> -- 

> 2.25.1


-- 
~Vinod

diff --git a/arch/arm/boot/dts/qcom-sdx55-mtp.dts b/arch/arm/boot/dts/qcom-sdx55-mtp.dts
index 74ea6f425c77..b8d432a4324c 100644
--- a/arch/arm/boot/dts/qcom-sdx55-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx55-mtp.dts
@@ -29,3 +29,15 @@  &blsp1_uart3 {
 &qpic_bam {
 	status = "ok";
 };
+
+&qpic_nand {
+	status = "ok";
+
+	nand@0 {
+		reg = <0>;
+
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+	};
+};

[v2,12/18] ARM: dts: qcom: sdx55-mtp: Enable QPIC NAND

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