diff mbox series

arm64: dts: allwinner: h5: Add deinterlace node

Message ID 20210106182523.1325796-1-jernej.skrabec@siol.net
State Accepted
Commit 086b4f7afdeda24adabcb199cd23a5055b0cbe7b
Headers show
Series arm64: dts: allwinner: h5: Add deinterlace node | expand

Commit Message

Jernej Škrabec Jan. 6, 2021, 6:25 p.m. UTC
Deinterlace core is completely compatible to H3.

Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
Note: I didn't add H5 fallback, since the only reason why this node
is not in common H3/H5 dtsi is that it's located on different addresses.

If anyone feel fallback compatible is needed, I'll add it in next revision.

 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 10489e508695..578a63dedf46 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -121,6 +121,19 @@  crypto: crypto@1c15000 {
 			resets = <&ccu RST_BUS_CE>;
 		};
 
+		deinterlace: deinterlace@1e00000 {
+			compatible = "allwinner,sun8i-h3-deinterlace";
+			reg = <0x01e00000 0x20000>;
+			clocks = <&ccu CLK_BUS_DEINTERLACE>,
+				 <&ccu CLK_DEINTERLACE>,
+				 <&ccu CLK_DRAM_DEINTERLACE>;
+			clock-names = "bus", "mod", "ram";
+			resets = <&ccu RST_BUS_DEINTERLACE>;
+			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+			interconnects = <&mbus 9>;
+			interconnect-names = "dma-mem";
+		};
+
 		mali: gpu@1e80000 {
 			compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
 			reg = <0x01e80000 0x30000>;