diff mbox series

pinctrl: qcom: spmi-gpio: Assign boolean values to a bool variable

Message ID 1611127757-52999-1-git-send-email-abaci-bugfix@linux.alibaba.com
State New
Headers show
Series pinctrl: qcom: spmi-gpio: Assign boolean values to a bool variable | expand

Commit Message

Abaci Team Jan. 20, 2021, 7:29 a.m. UTC
Fix the following coccicheck warnings:

./drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:340:3-15: WARNING:
Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
---
 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Bjorn Andersson Jan. 21, 2021, 3:19 a.m. UTC | #1
On Wed 20 Jan 01:29 CST 2021, Jiapeng Zhong wrote:

> Fix the following coccicheck warnings:
> 
> ./drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:340:3-15: WARNING:
> Assignment of 0/1 to bool variable.
> 
> Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Although we're mixing bool/int on line 417 and 637 as well, with:

	val |= pin->disable;

and

	pin->disable = val & BIT(0);

respectively. The latter could be dealt with using !!(val & BIT(0)); I
guess the appropriate for for the prior is:

	if (pin->disable)
		val |= BIT(0);

If you would like to update your patch with these as well I'd be happy
to review this.

Thanks,
Bjorn

> ---
>  drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
> index b5949f7..eb0b60c 100644
> --- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
> +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
> @@ -331,13 +331,13 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
>  		case PIN_CONFIG_BIAS_DISABLE:
>  			pin->bias = PM8XXX_GPIO_BIAS_NP;
>  			banks |= BIT(2);
> -			pin->disable = 0;
> +			pin->disable = false;
>  			banks |= BIT(3);
>  			break;
>  		case PIN_CONFIG_BIAS_PULL_DOWN:
>  			pin->bias = PM8XXX_GPIO_BIAS_PD;
>  			banks |= BIT(2);
> -			pin->disable = 0;
> +			pin->disable = false;
>  			banks |= BIT(3);
>  			break;
>  		case PM8XXX_QCOM_PULL_UP_STRENGTH:
> @@ -350,11 +350,11 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
>  		case PIN_CONFIG_BIAS_PULL_UP:
>  			pin->bias = pin->pull_up_strength;
>  			banks |= BIT(2);
> -			pin->disable = 0;
> +			pin->disable = false;
>  			banks |= BIT(3);
>  			break;
>  		case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
> -			pin->disable = 1;
> +			pin->disable = true;
>  			banks |= BIT(3);
>  			break;
>  		case PIN_CONFIG_INPUT_ENABLE:
> -- 
> 1.8.3.1
>
Linus Walleij Jan. 22, 2021, 1:16 p.m. UTC | #2
On Thu, Jan 21, 2021 at 4:19 AM Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
> On Wed 20 Jan 01:29 CST 2021, Jiapeng Zhong wrote:
>
> > Fix the following coccicheck warnings:
> >
> > ./drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:340:3-15: WARNING:
> > Assignment of 0/1 to bool variable.
> >
> > Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> > Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Although we're mixing bool/int on line 417 and 637 as well, with:
>
>         val |= pin->disable;
>
> and
>
>         pin->disable = val & BIT(0);
>
> respectively. The latter could be dealt with using !!(val & BIT(0)); I
> guess the appropriate for for the prior is:
>
>         if (pin->disable)
>                 val |= BIT(0);
>
> If you would like to update your patch with these as well I'd be happy
> to review this.

I would opt for a respin with the above when we are anyways at it,
no hurry as it is no regression anyway.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
index b5949f7..eb0b60c 100644
--- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
@@ -331,13 +331,13 @@  static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
 		case PIN_CONFIG_BIAS_DISABLE:
 			pin->bias = PM8XXX_GPIO_BIAS_NP;
 			banks |= BIT(2);
-			pin->disable = 0;
+			pin->disable = false;
 			banks |= BIT(3);
 			break;
 		case PIN_CONFIG_BIAS_PULL_DOWN:
 			pin->bias = PM8XXX_GPIO_BIAS_PD;
 			banks |= BIT(2);
-			pin->disable = 0;
+			pin->disable = false;
 			banks |= BIT(3);
 			break;
 		case PM8XXX_QCOM_PULL_UP_STRENGTH:
@@ -350,11 +350,11 @@  static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
 		case PIN_CONFIG_BIAS_PULL_UP:
 			pin->bias = pin->pull_up_strength;
 			banks |= BIT(2);
-			pin->disable = 0;
+			pin->disable = false;
 			banks |= BIT(3);
 			break;
 		case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
-			pin->disable = 1;
+			pin->disable = true;
 			banks |= BIT(3);
 			break;
 		case PIN_CONFIG_INPUT_ENABLE: