| Message ID | 1612253821-1148-3-git-send-email-stefanc@marvell.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | net: mvpp2: Add TX Flow Control support | expand |
Hi, wt., 2 lut 2021 o 09:17 <stefanc@marvell.com> napisał(a): > > From: Konstantin Porotchkin <kostap@marvell.com> > > CM3 SRAM address space would be used for Flow Control configuration. > > Signed-off-by: Stefan Chulski <stefanc@marvell.com> > Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> > --- > arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > index 9dcf16b..359cf42 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi The commit message mentions CP115, but the patch updates both CP110 and CP115 - please update one of those (either message or the patch), so that it is consistent. Thanks, Marcin > @@ -69,6 +69,8 @@ > status = "disabled"; > dma-coherent; > > + cm3-mem = <&CP11X_LABEL(cm3_sram)>; > + > CP11X_LABEL(eth0): eth0 { > interrupts = <39 IRQ_TYPE_LEVEL_HIGH>, > <43 IRQ_TYPE_LEVEL_HIGH>, > @@ -211,6 +213,14 @@ > }; > }; > > + CP11X_LABEL(cm3_sram): cm3@220000 { > + compatible = "mmio-sram"; > + reg = <0x220000 0x800>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x220000 0x800>; > + }; > + > CP11X_LABEL(rtc): rtc@284000 { > compatible = "marvell,armada-8k-rtc"; > reg = <0x284000 0x20>, <0x284080 0x24>; > -- > 1.9.1 >
diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi index 9dcf16b..359cf42 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -69,6 +69,8 @@ status = "disabled"; dma-coherent; + cm3-mem = <&CP11X_LABEL(cm3_sram)>; + CP11X_LABEL(eth0): eth0 { interrupts = <39 IRQ_TYPE_LEVEL_HIGH>, <43 IRQ_TYPE_LEVEL_HIGH>, @@ -211,6 +213,14 @@ }; }; + CP11X_LABEL(cm3_sram): cm3@220000 { + compatible = "mmio-sram"; + reg = <0x220000 0x800>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x220000 0x800>; + }; + CP11X_LABEL(rtc): rtc@284000 { compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>;