| Message ID | 1612420939-15502-3-git-send-email-mkrishn@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v10,1/4] dt-bindings: msm: disp: add yaml schemas for DPU bindings | expand |
Quoting Krishna Manikandan (2021-02-03 22:42:18) > diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml > new file mode 100644 > index 0000000..cf6d09a > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml > @@ -0,0 +1,93 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Description of Qualcomm Display DSI 10nm PHY dt properties > + > +maintainers: > + - Krishna Manikandan <mkrishn@codeaurora.org> > + > +description: | > + Common Device tree bindings for DSI 10nm PHY. > + > +properties: > + compatible: > + oneOf: > + - const: qcom,dsi-phy-10nm > + - const: qcom,dsi-phy-10nm-8998 > + > + reg-names: > + items: > + - const: dsi_phy > + - const: dsi_phy_lane > + - const: dsi_pll > + > + "#clock-cells": > + const: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 2 > + items: > + - description: Display AHB clock > + - description: Board XO source > + > + clock-names: > + items: > + - const: iface > + - const: ref > + > + vdds-supply: > + description: | > + Phandle to vdds regulator device node. This supply will be connected to > + DSI0_MIPI_DSI_PLL_VDDA0P9 pin. Cool, can we get this same description for the other SoCs? It helps SoC integrators understand the pin on the SoC and how it relates to this supply because the name is different. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - vdds-supply > + > +additionalProperties: true > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> > + #include <dt-bindings/clock/qcom,rpmh.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; You can leave out the soc node. > + > + mdss@ae00000 { > + #address-cells = <2>; > + #size-cells = <2>; > + reg = <0 0xae00000 0 0x1000>; > + > + dsi-phy@ae94400 { > + compatible = "qcom,dsi-phy-10nm"; > + reg = <0 0x0ae94400 0 0x200>, > + <0 0x0ae94600 0 0x280>, > + <0 0x0ae94a00 0 0x1e0>; > + reg-names = "dsi_phy", > + "dsi_phy_lane", > + "dsi_pll"; > + > + #clock-cells = <1>; > + #phy-cells = <0>; > + > + vdds-supply = <&vdda_mipi_dsi0_pll>; > + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "iface", "ref"; > + > + }; > + }; > + }; > +... > diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml > new file mode 100644 > index 0000000..3ec6c25 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Description of Qualcomm Display DSI 14nm PHY dt properties > + > +maintainers: > + - Krishna Manikandan <mkrishn@codeaurora.org> > + > +description: | > + Common Device tree bindings for DSI 14nm PHY. > + > +properties: > + compatible: > + oneOf: > + - const: qcom,dsi-phy-14nm > + - const: qcom,dsi-phy-14nm-660 > + > + reg-names: > + items: > + - const: dsi_phy > + - const: dsi_phy_lane > + - const: dsi_pll > + > + "#clock-cells": > + const: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 2 > + items: > + - description: Display AHB clock > + - description: Board XO source > + > + clock-names: > + items: > + - const: iface > + - const: ref > + > + vcca-supply: > + description: Phandle to vcca regulator device node. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - vcca-supply > + > +additionalProperties: true > +... > diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml > new file mode 100644 > index 0000000..ce1996e > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Description of Qualcomm Display DSI 20nm PHY dt properties > + > +maintainers: > + - Krishna Manikandan <mkrishn@codeaurora.org> > + > +description: | > + Common Device tree bindings for DSI 20nm PHY. > + > +properties: > + compatible: > + oneOf: > + - const: qcom,dsi-phy-20nm > + > + reg-names: > + items: > + - const: dsi_pll > + - const: dsi_phy > + - const: dsi_phy_regulator > + > + "#clock-cells": > + const: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 2 There's a maxItems but then clocks is required. Does that mean sometimes no clocks are required? Seems like maxItems should be dropped. > + items: > + - description: Display AHB clock > + - description: Board XO source > + > + clock-names: > + items: > + - const: iface > + - const: ref > + > + vcca-supply: > + description: Phandle to vcca regulator device node. > + > + vddio-supply: > + description: Phandle to vdd-io regulator device node. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - vddio-supply > + - vcca-supply > + > +additionalProperties: true > +... Where's the example? > diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml > new file mode 100644 > index 0000000..dfe09fd > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Description of Qualcomm Display DSI 28nm PHY dt properties > + > +maintainers: > + - Krishna Manikandan <mkrishn@codeaurora.org> > + > +description: | > + Common Device tree bindings for DSI 28nm PHY. > + > +properties: > + compatible: > + oneOf: > + - const: qcom,dsi-phy-28nm-hpm > + - const: qcom,dsi-phy-28nm-lp > + - const: qcom,dsi-phy-28nm-8960 > + > + reg-names: > + items: > + - const: dsi_pll > + - const: dsi_phy > + - const: dsi_phy_regulator > + > + "#clock-cells": > + const: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 2 > + items: > + - description: Display AHB clock > + - description: Board XO source > + > + clock-names: > + items: > + - const: iface > + - const: ref > + > + vddio-supply: > + description: Phandle to vdd-io regulator device node. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - vddio-supply > + > +additionalProperties: true > +... Where's the example?
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file mode 100644 index 0000000..cf6d09a --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 10nm PHY dt properties + +maintainers: + - Krishna Manikandan <mkrishn@codeaurora.org> + +description: | + Common Device tree bindings for DSI 10nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-10nm + - const: qcom,dsi-phy-10nm-8998 + + reg-names: + items: + - const: dsi_phy + - const: dsi_phy_lane + - const: dsi_pll + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vdds-supply: + description: | + Phandle to vdds regulator device node. This supply will be connected to + DSI0_MIPI_DSI_PLL_VDDA0P9 pin. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - vdds-supply + +additionalProperties: true + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,rpmh.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mdss@ae00000 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + + dsi-phy@ae94400 { + compatible = "qcom,dsi-phy-10nm"; + reg = <0 0x0ae94400 0 0x200>, + <0 0x0ae94600 0 0x280>, + <0 0x0ae94a00 0 0x1e0>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + vdds-supply = <&vdda_mipi_dsi0_pll>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml new file mode 100644 index 0000000..3ec6c25 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 14nm PHY dt properties + +maintainers: + - Krishna Manikandan <mkrishn@codeaurora.org> + +description: | + Common Device tree bindings for DSI 14nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-14nm + - const: qcom,dsi-phy-14nm-660 + + reg-names: + items: + - const: dsi_phy + - const: dsi_phy_lane + - const: dsi_pll + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vcca-supply: + description: Phandle to vcca regulator device node. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - vcca-supply + +additionalProperties: true +... diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml new file mode 100644 index 0000000..ce1996e --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 20nm PHY dt properties + +maintainers: + - Krishna Manikandan <mkrishn@codeaurora.org> + +description: | + Common Device tree bindings for DSI 20nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-20nm + + reg-names: + items: + - const: dsi_pll + - const: dsi_phy + - const: dsi_phy_regulator + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vcca-supply: + description: Phandle to vcca regulator device node. + + vddio-supply: + description: Phandle to vdd-io regulator device node. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - vddio-supply + - vcca-supply + +additionalProperties: true +... diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml new file mode 100644 index 0000000..dfe09fd --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 28nm PHY dt properties + +maintainers: + - Krishna Manikandan <mkrishn@codeaurora.org> + +description: | + Common Device tree bindings for DSI 28nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-28nm-hpm + - const: qcom,dsi-phy-28nm-lp + - const: qcom,dsi-phy-28nm-8960 + + reg-names: + items: + - const: dsi_pll + - const: dsi_phy + - const: dsi_phy_regulator + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vddio-supply: + description: Phandle to vdd-io regulator device node. + +required: + - compatible + - reg + - reg-names + - clocks + - vddio-supply + +additionalProperties: true +...
Add YAML schema for the device tree bindings for DSI PHY. Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Changes in v1: - Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd) - Remove qcom,dsi-phy-regulator-ldo-mode (Stephen Boyd) - Add clock cells properly (Stephen Boyd) - Remove unnecessary decription from clock names (Stephen Boyd) - Add pin names for the supply entries for 10nm phy which is used in sc7180 and sdm845 (Stephen Boyd) - Remove unused header files from examples (Stephen Boyd) - Drop labels for display nodes and correct node name (Stephen Boyd) --- .../bindings/display/msm/dsi-phy-10nm.yaml | 93 ++++++++++++++++++++++ .../bindings/display/msm/dsi-phy-14nm.yaml | 56 +++++++++++++ .../bindings/display/msm/dsi-phy-20nm.yaml | 59 ++++++++++++++ .../bindings/display/msm/dsi-phy-28nm.yaml | 56 +++++++++++++ 4 files changed, 264 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml