diff mbox series

[v2,10/20] net/dpaa2: add support for raw pattern in dpdmux

Message ID 20210211141620.12482-11-hemant.agrawal@nxp.com
State Superseded
Headers show
Series NXP DPAAx ethernet PMD changes | expand

Commit Message

Hemant Agrawal Feb. 11, 2021, 2:16 p.m. UTC
From: Akhil Goyal <akhil.goyal@nxp.com>


Added support for flow raw pattern and check that the call
for dpdmux_set_custom_key() which should be called
only once for a particular DPDMUX as all previous rules
will be erased with this call.
Hence calling it for the first time only.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>

---
 drivers/net/dpaa2/dpaa2_mux.c         | 39 ++++++++++++++++++++++-----
 drivers/net/dpaa2/mc/dpdmux.c         |  3 ++-
 drivers/net/dpaa2/mc/fsl_dpdmux.h     | 12 +++++++--
 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h |  4 +--
 4 files changed, 46 insertions(+), 12 deletions(-)

-- 
2.17.1
diff mbox series

Patch

diff --git a/drivers/net/dpaa2/dpaa2_mux.c b/drivers/net/dpaa2/dpaa2_mux.c
index b397d333d6..b669a16fc1 100644
--- a/drivers/net/dpaa2/dpaa2_mux.c
+++ b/drivers/net/dpaa2/dpaa2_mux.c
@@ -66,6 +66,7 @@  rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 	void *key_iova, *mask_iova, *key_cfg_iova = NULL;
 	uint8_t key_size = 0;
 	int ret;
+	static int i;
 
 	/* Find the DPDMUX from dpdmux_id in our list */
 	dpdmux_dev = get_dpdmux_from_id(dpdmux_id);
@@ -154,6 +155,23 @@  rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 	}
 	break;
 
+	case RTE_FLOW_ITEM_TYPE_RAW:
+	{
+		const struct rte_flow_item_raw *spec;
+
+		spec = (const struct rte_flow_item_raw *)pattern[0]->spec;
+		kg_cfg.extracts[0].extract.from_data.offset = spec->offset;
+		kg_cfg.extracts[0].extract.from_data.size = spec->length;
+		kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_DATA;
+		kg_cfg.num_extracts = 1;
+		memcpy((void *)key_iova, (const void *)spec->pattern,
+							spec->length);
+		memcpy(mask_iova, pattern[0]->mask, spec->length);
+
+		key_size = spec->length;
+	}
+	break;
+
 	default:
 		DPAA2_PMD_ERR("Not supported pattern type: %d",
 				pattern[0]->type);
@@ -166,20 +184,27 @@  rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 		goto creation_error;
 	}
 
-	ret = dpdmux_set_custom_key(&dpdmux_dev->dpdmux, CMD_PRI_LOW,
-				    dpdmux_dev->token,
-			(uint64_t)(DPAA2_VADDR_TO_IOVA(key_cfg_iova)));
-	if (ret) {
-		DPAA2_PMD_ERR("dpdmux_set_custom_key failed: err(%d)", ret);
-		goto creation_error;
+	/* Multiple rules with same DPKG extracts (kg_cfg.extracts) like same
+	 * offset and length values in raw is supported right now. Different
+	 * values of kg_cfg may not work.
+	 */
+	if (i == 0) {
+		ret = dpdmux_set_custom_key(&dpdmux_dev->dpdmux, CMD_PRI_LOW,
+					    dpdmux_dev->token,
+				(uint64_t)(DPAA2_VADDR_TO_IOVA(key_cfg_iova)));
+		if (ret) {
+			DPAA2_PMD_ERR("dpdmux_set_custom_key failed: err(%d)",
+					ret);
+			goto creation_error;
+		}
 	}
-
 	/* As now our key extract parameters are set, let us configure
 	 * the rule.
 	 */
 	flow->rule.key_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(key_iova));
 	flow->rule.mask_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(mask_iova));
 	flow->rule.key_size = key_size;
+	flow->rule.entry_index = i++;
 
 	vf_conf = (const struct rte_flow_action_vf *)(actions[0]->conf);
 	if (vf_conf->id == 0 || vf_conf->id > dpdmux_dev->num_ifs) {
diff --git a/drivers/net/dpaa2/mc/dpdmux.c b/drivers/net/dpaa2/mc/dpdmux.c
index 63f1ec7d30..67d37ed4cd 100644
--- a/drivers/net/dpaa2/mc/dpdmux.c
+++ b/drivers/net/dpaa2/mc/dpdmux.c
@@ -1,7 +1,7 @@ 
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2021 NXP
  *
  */
 #include <fsl_mc_sys.h>
@@ -852,6 +852,7 @@  int dpdmux_add_custom_cls_entry(struct fsl_mc_io *mc_io,
 
 	cmd_params = (struct dpdmux_cmd_add_custom_cls_entry *)cmd.params;
 	cmd_params->key_size = rule->key_size;
+	cmd_params->entry_index = rule->entry_index;
 	cmd_params->dest_if = cpu_to_le16(action->dest_if);
 	cmd_params->key_iova = cpu_to_le64(rule->key_iova);
 	cmd_params->mask_iova = cpu_to_le64(rule->mask_iova);
diff --git a/drivers/net/dpaa2/mc/fsl_dpdmux.h b/drivers/net/dpaa2/mc/fsl_dpdmux.h
index accd1ef5c1..b809aade5d 100644
--- a/drivers/net/dpaa2/mc/fsl_dpdmux.h
+++ b/drivers/net/dpaa2/mc/fsl_dpdmux.h
@@ -1,7 +1,7 @@ 
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2021 NXP
  *
  */
 #ifndef __FSL_DPDMUX_H
@@ -367,15 +367,23 @@  int dpdmux_set_custom_key(struct fsl_mc_io *mc_io,
  * struct dpdmux_rule_cfg - Custom classification rule.
  *
  * @key_iova: DMA address of buffer storing the look-up value
- * @mask_iova: DMA address of the mask used for TCAM classification
+ * @mask_iova: DMA address of the mask used for TCAM classification. This
+ *  parameter is used only if dpdmux was created using option
+ *  DPDMUX_OPT_CLS_MASK_SUPPORT.
  * @key_size: size, in bytes, of the look-up value. This must match the size
  *	of the look-up key defined using dpdmux_set_custom_key, otherwise the
  *	entry will never be hit
+ * @entry_index: rule index into the table. This parameter is used only when
+ *  dpdmux object was created using option DPDMUX_OPT_CLS_MASK_SUPPORT. In
+ *  this case the rule is masking and the current frame may be a hit for
+ *  multiple rules. This parameter determines the order in wich the rules
+ *  will be checked (smaller entry_index first).
  */
 struct dpdmux_rule_cfg {
 	uint64_t key_iova;
 	uint64_t mask_iova;
 	uint8_t key_size;
+	uint16_t entry_index;
 };
 
 /**
diff --git a/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h b/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
index a60b2ebe3c..b6b8c38c41 100644
--- a/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
@@ -1,7 +1,7 @@ 
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2021 NXP
  *
  */
 #ifndef _FSL_DPDMUX_CMD_H
@@ -204,7 +204,7 @@  struct dpdmux_set_custom_key {
 struct dpdmux_cmd_add_custom_cls_entry {
 	uint8_t pad[3];
 	uint8_t key_size;
-	uint16_t pad1;
+	uint16_t entry_index;
 	uint16_t dest_if;
 	uint64_t key_iova;
 	uint64_t mask_iova;