| Message ID | 20210222160300.1811121-19-bryan.odonoghue@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | media: venus: Enable 6xx support | expand |
On 2/22/21 6:02 PM, Bryan O'Donoghue wrote: > From: Dikshita Agarwal <dikshita@codeaurora.org> > > This patch takes the downstream AXI halt routine and applies it when > IS_V6() is true. > > bod: Converted to readl_poll_timeout() > Converted LPI update timeout to dev_dbg. In practice this register > never appears to update with the value 0x07. Discussing with contacts > in qcom video team, this toggle only pertains to low-power mode. > Keeping the write for the sake of fidelity with downstream. > > Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> > Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > --- > drivers/media/platform/qcom/venus/hfi_venus.c | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c > index 24cf20f76e7f..01c100db07d3 100644 > --- a/drivers/media/platform/qcom/venus/hfi_venus.c > +++ b/drivers/media/platform/qcom/venus/hfi_venus.c > @@ -541,10 +541,55 @@ static int venus_halt_axi(struct venus_hfi_device *hdev) > { > void __iomem *wrapper_base = hdev->core->wrapper_base; > void __iomem *vbif_base = hdev->core->vbif_base; > + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; > + void __iomem *aon_base = hdev->core->aon_base; > struct device *dev = hdev->core->dev; > u32 val; > + u32 mask_val; > int ret; > > + if (IS_V6(hdev->core)) { > + writel(0x3, cpu_cs_base + CPU_CS_X2RPMH_V6); > + > + writel(0x1, aon_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL); > + ret = readl_poll_timeout(aon_base + AON_WRAPPER_MVP_NOC_LPI_STATUS, > + val, > + val & BIT(0), > + POLL_INTERVAL_US, > + VBIF_AXI_HALT_ACK_TIMEOUT_US); > + if (ret) { > + dev_err(dev, "NOC not in qaccept status %x\n", val); Could you drop this error msg. I don't see any valuable information in it. > + return -ETIMEDOUT; > + } > + > + /* HPG 6.1.2 Step 3, debug bridge to low power */ This comment does not add any information, please drop it. > + mask_val = (BIT(2) | BIT(1) | BIT(0)); > + writel(mask_val, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); > + > + ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, > + val, > + (val & mask_val) == mask_val, > + POLL_INTERVAL_US, > + VBIF_AXI_HALT_ACK_TIMEOUT_US); > + > + if (ret) > + dev_dbg(dev, "DBLP Set: status %x\n", val); Do we need this as well? From what I can see this always timeouts and increase the time of module loading. > + > + /* HPG 6.1.2 Step 4, debug bridge to lpi release */ ditto > + writel(0x00, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); > + ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, > + val, > + val == 0, > + POLL_INTERVAL_US, > + VBIF_AXI_HALT_ACK_TIMEOUT_US); > + > + if (ret) { > + dev_err(dev, "DBLP Release: lpi_status %x\n", val); > + return -ETIMEDOUT; > + } > + return 0; > + } > + > if (IS_V4(hdev->core)) { > val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); > val |= WRAPPER_CPU_AXI_HALT_HALT; >
diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 24cf20f76e7f..01c100db07d3 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -541,10 +541,55 @@ static int venus_halt_axi(struct venus_hfi_device *hdev) { void __iomem *wrapper_base = hdev->core->wrapper_base; void __iomem *vbif_base = hdev->core->vbif_base; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *aon_base = hdev->core->aon_base; struct device *dev = hdev->core->dev; u32 val; + u32 mask_val; int ret; + if (IS_V6(hdev->core)) { + writel(0x3, cpu_cs_base + CPU_CS_X2RPMH_V6); + + writel(0x1, aon_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL); + ret = readl_poll_timeout(aon_base + AON_WRAPPER_MVP_NOC_LPI_STATUS, + val, + val & BIT(0), + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); + if (ret) { + dev_err(dev, "NOC not in qaccept status %x\n", val); + return -ETIMEDOUT; + } + + /* HPG 6.1.2 Step 3, debug bridge to low power */ + mask_val = (BIT(2) | BIT(1) | BIT(0)); + writel(mask_val, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); + + ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, + val, + (val & mask_val) == mask_val, + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); + + if (ret) + dev_dbg(dev, "DBLP Set: status %x\n", val); + + /* HPG 6.1.2 Step 4, debug bridge to lpi release */ + writel(0x00, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); + ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, + val, + val == 0, + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); + + if (ret) { + dev_err(dev, "DBLP Release: lpi_status %x\n", val); + return -ETIMEDOUT; + } + return 0; + } + if (IS_V4(hdev->core)) { val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); val |= WRAPPER_CPU_AXI_HALT_HALT;