| Message ID | 463a45f2c3e4a91430c006fa1637c7f4f124185e.1614244789.git.saiprakash.ranjan@codeaurora.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/9] dt-bindings: arm: msm: Add LLCC for SC7280 | expand |
Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) > Add a DT node for the AOSS QMP on SC7280 SoC. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 65c1e0f2fb56..cbd567ccc04e 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -9,6 +9,7 @@ > #include <dt-bindings/clock/qcom,rpmh.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/mailbox/qcom-ipcc.h> > +#include <dt-bindings/power/qcom-aoss-qmp.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > > / { > @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { > interrupt-controller; > }; > > + aoss_qmp: qmp@c300000 { power-domain-controller@c300000? power-controller@c300000? > + compatible = "qcom,sc7280-aoss-qmp"; > + reg = <0 0x0c300000 0 0x100000>; > + interrupts-extended = <&ipcc IPCC_CLIENT_AOP > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_AOP > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + #clock-cells = <0>; > + #power-domain-cells = <1>; > + }; > + > spmi_bus: qcom,spmi@c440000 { Ick, should be spmi@ > compatible = "qcom,spmi-pmic-arb"; > reg = <0 0x0c440000 0 0x1100>,
On 2021-02-26 01:11, Stephen Boyd wrote: > Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) >> Add a DT node for the AOSS QMP on SC7280 SoC. >> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> >> --- >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index 65c1e0f2fb56..cbd567ccc04e 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -9,6 +9,7 @@ >> #include <dt-bindings/clock/qcom,rpmh.h> >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >> +#include <dt-bindings/power/qcom-aoss-qmp.h> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> >> / { >> @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { >> interrupt-controller; >> }; >> >> + aoss_qmp: qmp@c300000 { > > power-domain-controller@c300000? power-controller@c300000? > Its an AOSS message RAM and all other SM* SoCs have as qmp@ and the dt binding as well, I see only SM8150 with power-controller, that should probably be fixed? >> + compatible = "qcom,sc7280-aoss-qmp"; >> + reg = <0 0x0c300000 0 0x100000>; >> + interrupts-extended = <&ipcc IPCC_CLIENT_AOP >> + >> IPCC_MPROC_SIGNAL_GLINK_QMP >> + >> IRQ_TYPE_EDGE_RISING>; >> + mboxes = <&ipcc IPCC_CLIENT_AOP >> + IPCC_MPROC_SIGNAL_GLINK_QMP>; >> + >> + #clock-cells = <0>; >> + #power-domain-cells = <1>; >> + }; >> + >> spmi_bus: qcom,spmi@c440000 { > > Ick, should be spmi@ > Not introduced by this patch but I'll pass on the comment. >> compatible = "qcom,spmi-pmic-arb"; >> reg = <0 0x0c440000 0 0x1100>, Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Quoting Sai Prakash Ranjan (2021-02-25 23:51:00) > On 2021-02-26 01:11, Stephen Boyd wrote: > > Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) > >> Add a DT node for the AOSS QMP on SC7280 SoC. > >> > >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > >> --- > >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ > >> 1 file changed, 14 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi > >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi > >> index 65c1e0f2fb56..cbd567ccc04e 100644 > >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > >> @@ -9,6 +9,7 @@ > >> #include <dt-bindings/clock/qcom,rpmh.h> > >> #include <dt-bindings/interrupt-controller/arm-gic.h> > >> #include <dt-bindings/mailbox/qcom-ipcc.h> > >> +#include <dt-bindings/power/qcom-aoss-qmp.h> > >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> > >> > >> / { > >> @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { > >> interrupt-controller; > >> }; > >> > >> + aoss_qmp: qmp@c300000 { > > > > power-domain-controller@c300000? power-controller@c300000? > > > > Its an AOSS message RAM and all other SM* SoCs have as qmp@ > and the dt binding as well, I see only SM8150 with power-controller, > that should probably be fixed? Node name should be generic while still being meaningful. Nobody knows what qmp is, but power-controller makes sense. Can you fix this and the others to be power-controller?
On 2021-02-27 00:16, Stephen Boyd wrote: > Quoting Sai Prakash Ranjan (2021-02-25 23:51:00) >> On 2021-02-26 01:11, Stephen Boyd wrote: >> > Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) >> >> Add a DT node for the AOSS QMP on SC7280 SoC. >> >> >> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> >> >> --- >> >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ >> >> 1 file changed, 14 insertions(+) >> >> >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >> index 65c1e0f2fb56..cbd567ccc04e 100644 >> >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >> @@ -9,6 +9,7 @@ >> >> #include <dt-bindings/clock/qcom,rpmh.h> >> >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >> >> +#include <dt-bindings/power/qcom-aoss-qmp.h> >> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> >> >> >> / { >> >> @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { >> >> interrupt-controller; >> >> }; >> >> >> >> + aoss_qmp: qmp@c300000 { >> > >> > power-domain-controller@c300000? power-controller@c300000? >> > >> >> Its an AOSS message RAM and all other SM* SoCs have as qmp@ >> and the dt binding as well, I see only SM8150 with power-controller, >> that should probably be fixed? > > Node name should be generic while still being meaningful. Nobody knows > what qmp is, but power-controller makes sense. Can you fix this and the > others to be power-controller? > Ok makes sense, I will post changing others as well and see if we get any comments there. Thanks, Sai
On 2021-02-27 19:26, Sai Prakash Ranjan wrote: > On 2021-02-27 00:16, Stephen Boyd wrote: >> Quoting Sai Prakash Ranjan (2021-02-25 23:51:00) >>> On 2021-02-26 01:11, Stephen Boyd wrote: >>> > Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) >>> >> Add a DT node for the AOSS QMP on SC7280 SoC. >>> >> >>> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> >>> >> --- >>> >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ >>> >> 1 file changed, 14 insertions(+) >>> >> >>> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> >> index 65c1e0f2fb56..cbd567ccc04e 100644 >>> >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> >> @@ -9,6 +9,7 @@ >>> >> #include <dt-bindings/clock/qcom,rpmh.h> >>> >> #include <dt-bindings/interrupt-controller/arm-gic.h> >>> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >>> >> +#include <dt-bindings/power/qcom-aoss-qmp.h> >>> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >>> >> >>> >> / { >>> >> @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { >>> >> interrupt-controller; >>> >> }; >>> >> >>> >> + aoss_qmp: qmp@c300000 { >>> > >>> > power-domain-controller@c300000? power-controller@c300000? >>> > >>> >>> Its an AOSS message RAM and all other SM* SoCs have as qmp@ >>> and the dt binding as well, I see only SM8150 with power-controller, >>> that should probably be fixed? >> >> Node name should be generic while still being meaningful. Nobody knows >> what qmp is, but power-controller makes sense. Can you fix this and >> the >> others to be power-controller? >> we probably would be changing them back to qmp or something more generic soon since the consensus was qmp wasn't a power-controller. So not sure if its worth the effort here. > > Ok makes sense, I will post changing others as well and see if we get > any comments there. > > Thanks, > Sai -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Quoting Sibi Sankar (2021-03-08 21:58:21) > On 2021-02-27 19:26, Sai Prakash Ranjan wrote: > > On 2021-02-27 00:16, Stephen Boyd wrote: > >> Quoting Sai Prakash Ranjan (2021-02-25 23:51:00) > >>> On 2021-02-26 01:11, Stephen Boyd wrote: > >>> > Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) > >>> >> Add a DT node for the AOSS QMP on SC7280 SoC. > >>> >> > >>> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > >>> >> --- > >>> >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ > >>> >> 1 file changed, 14 insertions(+) > >>> >> > >>> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi > >>> >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi > >>> >> index 65c1e0f2fb56..cbd567ccc04e 100644 > >>> >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > >>> >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > >>> >> @@ -9,6 +9,7 @@ > >>> >> #include <dt-bindings/clock/qcom,rpmh.h> > >>> >> #include <dt-bindings/interrupt-controller/arm-gic.h> > >>> >> #include <dt-bindings/mailbox/qcom-ipcc.h> > >>> >> +#include <dt-bindings/power/qcom-aoss-qmp.h> > >>> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> > >>> >> > >>> >> / { > >>> >> @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { > >>> >> interrupt-controller; > >>> >> }; > >>> >> > >>> >> + aoss_qmp: qmp@c300000 { > >>> > > >>> > power-domain-controller@c300000? power-controller@c300000? > >>> > > >>> > >>> Its an AOSS message RAM and all other SM* SoCs have as qmp@ > >>> and the dt binding as well, I see only SM8150 with power-controller, > >>> that should probably be fixed? > >> > >> Node name should be generic while still being meaningful. Nobody knows > >> what qmp is, but power-controller makes sense. Can you fix this and > >> the > >> others to be power-controller? > >> > > we probably would be changing them back > to qmp or something more generic soon > since the consensus was qmp wasn't a > power-controller. So not sure if its > worth the effort here. > Hmm alright. Maybe mailbox? qmp is not generic. What does it stand for? qualcomm messaging protocol?
On 2021-03-23 09:08, Stephen Boyd wrote: > Quoting Sibi Sankar (2021-03-08 21:58:21) >> On 2021-02-27 19:26, Sai Prakash Ranjan wrote: >> > On 2021-02-27 00:16, Stephen Boyd wrote: >> >> Quoting Sai Prakash Ranjan (2021-02-25 23:51:00) >> >>> On 2021-02-26 01:11, Stephen Boyd wrote: >> >>> > Quoting Sai Prakash Ranjan (2021-02-25 01:30:24) >> >>> >> Add a DT node for the AOSS QMP on SC7280 SoC. >> >>> >> >> >>> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> >> >>> >> --- >> >>> >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ >> >>> >> 1 file changed, 14 insertions(+) >> >>> >> >> >>> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >>> >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >>> >> index 65c1e0f2fb56..cbd567ccc04e 100644 >> >>> >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >>> >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> >>> >> @@ -9,6 +9,7 @@ >> >>> >> #include <dt-bindings/clock/qcom,rpmh.h> >> >>> >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> >>> >> #include <dt-bindings/mailbox/qcom-ipcc.h> >> >>> >> +#include <dt-bindings/power/qcom-aoss-qmp.h> >> >>> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> >>> >> >> >>> >> / { >> >>> >> @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { >> >>> >> interrupt-controller; >> >>> >> }; >> >>> >> >> >>> >> + aoss_qmp: qmp@c300000 { >> >>> > >> >>> > power-domain-controller@c300000? power-controller@c300000? >> >>> > >> >>> >> >>> Its an AOSS message RAM and all other SM* SoCs have as qmp@ >> >>> and the dt binding as well, I see only SM8150 with power-controller, >> >>> that should probably be fixed? >> >> >> >> Node name should be generic while still being meaningful. Nobody knows >> >> what qmp is, but power-controller makes sense. Can you fix this and >> >> the >> >> others to be power-controller? >> >> >> >> we probably would be changing them back >> to qmp or something more generic soon >> since the consensus was qmp wasn't a >> power-controller. So not sure if its >> worth the effort here. >> > > Hmm alright. Maybe mailbox? qmp is not generic. What does it stand for? > qualcomm messaging protocol? It's documented as ^^ in the git log but I guess it should be called qualcomm mailbox protocol instead. I don't think it can be called mailbox since it doesn't have mbox cells in its bindings. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 65c1e0f2fb56..cbd567ccc04e 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/mailbox/qcom-ipcc.h> +#include <dt-bindings/power/qcom-aoss-qmp.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> / { @@ -368,6 +369,19 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + aoss_qmp: qmp@c300000 { + compatible = "qcom,sc7280-aoss-qmp"; + reg = <0 0x0c300000 0 0x100000>; + interrupts-extended = <&ipcc IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + #clock-cells = <0>; + #power-domain-cells = <1>; + }; + spmi_bus: qcom,spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c440000 0 0x1100>,
Add a DT node for the AOSS QMP on SC7280 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)