From patchwork Tue Mar 2 03:47:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Henry Chen X-Patchwork-Id: 390690 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA4DAC4332B for ; Tue, 2 Mar 2021 08:39:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E62064D9E for ; Tue, 2 Mar 2021 08:39:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376855AbhCBIP6 (ORCPT ); Tue, 2 Mar 2021 03:15:58 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:40860 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1574608AbhCBDsW (ORCPT ); Mon, 1 Mar 2021 22:48:22 -0500 X-UUID: 75c8bf5ec316471fb5c99a883a7d4984-20210302 X-UUID: 75c8bf5ec316471fb5c99a883a7d4984-20210302 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1162331692; Tue, 02 Mar 2021 11:47:47 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 2 Mar 2021 11:47:46 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 2 Mar 2021 11:47:46 +0800 From: Henry Chen To: Georgi Djakov , Rob Herring , Matthias Brugger , Stephen Boyd , Ryan Case CC: Mark Rutland , Nicolas Boichat , Fan Chen , James Liao , Arvin Wang , , , , , , Henry Chen Subject: [PATCH V9 12/12] arm64: dts: mt8192: add dvfsrc regulator nodes Date: Tue, 2 Mar 2021 11:47:43 +0800 Message-ID: <1614656863-8530-13-git-send-email-henryc.chen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1614656863-8530-1-git-send-email-henryc.chen@mediatek.com> References: <1614656863-8530-1-git-send-email-henryc.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 2905025C958521C455DD09DA957E2F3777EFAA99BCDEBFED13A6A2CDE58D1FD82000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add dvfsrc regulator nodes which is for MT8192-based platforms Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 81d7d05..1cf91a4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -470,6 +470,12 @@ "mediatek,mt6873-dvfsrc"; reg = <0 0x10012000 0 0x1000>; #interconnect-cells = <1>; + dvfsrc_vcore: dvfsrc-vcore { + regulator-name = "dvfsrc-vcore"; + regulator-min-microvolt = <575000>; + regulator-max-microvolt = <725000>; + regulator-always-on; + }; }; systimer: timer@10017000 {