| Message ID | 1413973797-17619-4-git-send-email-yingjoe.chen@mediatek.com |
|---|---|
| State | Superseded |
| Headers | show |
2014-10-22 12:29 GMT+02:00 Joe.C <yingjoe.chen@mediatek.com>: > From: "Joe.C" <yingjoe.chen@mediatek.com> > > This adds a basic dtsi for MT8135 based SoC. > > Signed-off-by: Joe.C <yingjoe.chen@mediatek.com> > --- > arch/arm/boot/dts/mt8135.dtsi | 115 ++++++++++++++++++++++++++++++++++++++ > arch/arm/mach-mediatek/mediatek.c | 1 + > 2 files changed, 116 insertions(+) > create mode 100644 arch/arm/boot/dts/mt8135.dtsi > > diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi > new file mode 100644 > index 0000000..90a56ad > --- /dev/null > +++ b/arch/arm/boot/dts/mt8135.dtsi > @@ -0,0 +1,115 @@ > +/* > + * Copyright (c) 2014 MediaTek Inc. > + * Author: Joe.C <yingjoe.chen@mediatek.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > +#include "skeleton64.dtsi" Same here A15 is 32 bits. > + > +/ { > + compatible = "mediatek,mt8135"; > + interrupt-parent = <&gic>; > + > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&cpu0>; > + }; > + core1 { > + cpu = <&cpu1>; > + }; > + }; > + > + cluster1 { > + core0 { > + cpu = <&cpu2>; > + }; > + core1 { > + cpu = <&cpu3>; > + }; > + }; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x000>; > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x001>; > + }; > + > + cpu2: cpu@100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x100>; > + }; > + > + cpu3: cpu@101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x101>; > + }; > + }; > + > + clocks { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + system_clk: dummy13m { > + compatible = "fixed-clock"; > + clock-frequency = <13000000>; > + #clock-cells = <0>; > + }; > + > + rtc_clk: dummy32k { > + compatible = "fixed-clock"; > + clock-frequency = <32000>; > + #clock-cells = <0>; > + }; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + timer: timer@10008000 { > + compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer"; > + reg = <0 0x10008000 0 0x80>; > + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>, <&rtc_clk>; > + clock-names = "system-clk", "rtc-clk"; > + }; > + > + gic: interrupt-controller@10211000 { > + compatible = "arm,cortex-a15-gic"; > + interrupt-controller; > + #interrupt-cells = <3>; > + reg = <0 0x10211000 0 0x1000>, > + <0 0x10212000 0 0x1000>, > + <0 0x10214000 0 0x2000>, > + <0 0x10216000 0 0x2000>; > + }; > + }; > +}; > diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c > index 7f478ce..48051a2 100644 > --- a/arch/arm/mach-mediatek/mediatek.c > +++ b/arch/arm/mach-mediatek/mediatek.c > @@ -20,6 +20,7 @@ > static const char * const mediatek_board_dt_compat[] = { > "mediatek,mt6589", > "mediatek,mt8127", > + "mediatek,mt8135", > NULL, > }; > > -- > 1.8.1.1.dirty >
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi new file mode 100644 index 0000000..90a56ad --- /dev/null +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Joe.C <yingjoe.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "skeleton64.dtsi" + +/ { + compatible = "mediatek,mt8135"; + interrupt-parent = <&gic>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu2>; + }; + core1 { + cpu = <&cpu3>; + }; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x001>; + }; + + cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x100>; + }; + + cpu3: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x101>; + }; + }; + + clocks { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + timer: timer@10008000 { + compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer"; + reg = <0 0x10008000 0 0x80>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + gic: interrupt-controller@10211000 { + compatible = "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0 0x10211000 0 0x1000>, + <0 0x10212000 0 0x1000>, + <0 0x10214000 0 0x2000>, + <0 0x10216000 0 0x2000>; + }; + }; +}; diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c index 7f478ce..48051a2 100644 --- a/arch/arm/mach-mediatek/mediatek.c +++ b/arch/arm/mach-mediatek/mediatek.c @@ -20,6 +20,7 @@ static const char * const mediatek_board_dt_compat[] = { "mediatek,mt6589", "mediatek,mt8127", + "mediatek,mt8135", NULL, };