diff mbox

[v2] target-arm: Set carry flag correctly for Thumb2 ORNS

Message ID 1299443529-13209-1-git-send-email-peter.maydell@linaro.org
State Accepted
Commit 29501f1b9e6b1ee9d5d4761a452116321be5ae95
Headers show

Commit Message

Peter Maydell March 6, 2011, 8:32 p.m. UTC
The code for Thumb2 ORNS (or negated and set flags) was trashing
a TCG input register which was needed later for use in calculating
flags, with the effect that the carry flag was always set with
the wrong sense. Fix this by using the TCG orc op instead of
separate not and or ops.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Change from v1: use orc as suggested by Aurelien

 target-arm/translate.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

Comments

Aurelien Jarno March 6, 2011, 10:32 p.m. UTC | #1
On Sun, Mar 06, 2011 at 08:32:09PM +0000, Peter Maydell wrote:
> The code for Thumb2 ORNS (or negated and set flags) was trashing
> a TCG input register which was needed later for use in calculating
> flags, with the effect that the carry flag was always set with
> the wrong sense. Fix this by using the TCG orc op instead of
> separate not and or ops.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> Change from v1: use orc as suggested by Aurelien
> 
>  target-arm/translate.c |    3 +--
>  1 files changed, 1 insertions(+), 2 deletions(-)

Thanks, applied.

> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index dbd958b..dd56ac6 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -7326,8 +7326,7 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, TCG
>          logic_cc = conds;
>          break;
>      case 3: /* orn */
> -        tcg_gen_not_i32(t1, t1);
> -        tcg_gen_or_i32(t0, t0, t1);
> +        tcg_gen_orc_i32(t0, t0, t1);
>          logic_cc = conds;
>          break;
>      case 4: /* eor */
> -- 
> 1.7.1
> 
>
diff mbox

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index dbd958b..dd56ac6 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7326,8 +7326,7 @@  gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, TCG
         logic_cc = conds;
         break;
     case 3: /* orn */
-        tcg_gen_not_i32(t1, t1);
-        tcg_gen_or_i32(t0, t0, t1);
+        tcg_gen_orc_i32(t0, t0, t1);
         logic_cc = conds;
         break;
     case 4: /* eor */