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[209.132.180.67]) by mx.google.com with ESMTP id fw12si4011976pdb.207.2014.10.29.06.57.26 for ; Wed, 29 Oct 2014 06:57:27 -0700 (PDT) Received-SPF: none (google.com: linux-gpio-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932889AbaJ2N50 (ORCPT ); Wed, 29 Oct 2014 09:57:26 -0400 Received: from mail-gw3-out.broadcom.com ([216.31.210.64]:36456 "EHLO mail-gw3-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932834AbaJ2N50 (ORCPT ); Wed, 29 Oct 2014 09:57:26 -0400 X-IronPort-AV: E=Sophos;i="5.04,810,1406617200"; d="scan'208";a="49245032" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw3-out.broadcom.com with ESMTP; 29 Oct 2014 07:01:53 -0700 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Wed, 29 Oct 2014 06:57:25 -0700 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.174.1; Wed, 29 Oct 2014 06:57:25 -0700 Received: from linaro.ban.broadcom.com (unknown [10.131.60.135]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id E622A40FE8; Wed, 29 Oct 2014 06:57:06 -0700 (PDT) From: To: Linus Walleij , Alexandre Courbot CC: Kamlakant Patel , , Grant Likely Subject: [PATCH 2/5] gpio: timberdale: convert to use basic mmio gpio library Date: Wed, 29 Oct 2014 19:26:42 +0530 Message-ID: <1414591005-30961-3-git-send-email-kamlakant.patel@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414591005-30961-1-git-send-email-kamlakant.patel@linaro.org> References: <1414591005-30961-1-git-send-email-kamlakant.patel@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kamlakant.patel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Kamlakant Patel This patch converts TIMBERDALE GPIO driver to use basic_mmio_gpio generic library. Signed-off-by: Kamlakant Patel --- drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-timberdale.c | 90 ++++++++++++------------------------------ 2 files changed, 27 insertions(+), 64 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3bd4d63..875d312 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -783,6 +783,7 @@ config GPIO_SODAVILLE config GPIO_TIMBERDALE bool "Support for timberdale GPIO IP" depends on MFD_TIMBERDALE + select GPIO_GENERIC ---help--- Add support for the GPIO IP in the timberdale FPGA. diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index a685a3c..363ede8 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c @@ -28,7 +28,7 @@ #include #include #include - +#include #define DRIVER_NAME "timb-gpio" #define TGPIOVAL 0x00 @@ -50,52 +50,6 @@ struct timbgpio { unsigned long last_ier; }; -static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index, - unsigned offset, bool enabled) -{ - struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio); - u32 reg; - - spin_lock(&tgpio->lock); - reg = ioread32(tgpio->membase + offset); - - if (enabled) - reg |= (1 << index); - else - reg &= ~(1 << index); - - iowrite32(reg, tgpio->membase + offset); - spin_unlock(&tgpio->lock); - - return 0; -} - -static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) -{ - return timbgpio_update_bit(gpio, nr, TGPIODIR, true); -} - -static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) -{ - struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio); - u32 value; - - value = ioread32(tgpio->membase + TGPIOVAL); - return (value & (1 << nr)) ? 1 : 0; -} - -static int timbgpio_gpio_direction_output(struct gpio_chip *gpio, - unsigned nr, int val) -{ - return timbgpio_update_bit(gpio, nr, TGPIODIR, false); -} - -static void timbgpio_gpio_set(struct gpio_chip *gpio, - unsigned nr, int val) -{ - timbgpio_update_bit(gpio, nr, TGPIOVAL, val != 0); -} - static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) { struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio); @@ -225,7 +179,7 @@ static int timbgpio_probe(struct platform_device *pdev) { int err, i; struct device *dev = &pdev->dev; - struct gpio_chip *gc; + struct bgpio_chip *bgc; struct timbgpio *tgpio; struct resource *iomem; struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev); @@ -247,6 +201,11 @@ static int timbgpio_probe(struct platform_device *pdev) dev_err(dev, "Memory alloc failed\n"); return -EINVAL; } + + bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL); + if (!bgc) + return -EINVAL; + tgpio->irq_base = pdata->irq_base; spin_lock_init(&tgpio->lock); @@ -263,22 +222,25 @@ static int timbgpio_probe(struct platform_device *pdev) return -ENOMEM; } - gc = &tgpio->gpio; - - gc->label = dev_name(&pdev->dev); - gc->owner = THIS_MODULE; - gc->dev = &pdev->dev; - gc->direction_input = timbgpio_gpio_direction_input; - gc->get = timbgpio_gpio_get; - gc->direction_output = timbgpio_gpio_direction_output; - gc->set = timbgpio_gpio_set; - gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL; - gc->dbg_show = NULL; - gc->base = pdata->gpio_base; - gc->ngpio = pdata->nr_pins; - gc->can_sleep = false; - - err = gpiochip_add(gc); + err = bgpio_init(bgc, dev, 4, tgpio->membase + TGPIOVAL, + NULL, NULL, tgpio->membase + TGPIODIR, NULL, 0); + + if (err) { + dev_err(&pdev->dev, "bgpio_init failed\n"); + return err; + } + bgc->gc.label = dev_name(&pdev->dev); + bgc->gc.owner = THIS_MODULE; + bgc->gc.dev = &pdev->dev; + bgc->gc.to_irq = (irq >= 0 && tgpio->irq_base > 0) ? + timbgpio_to_irq : NULL; + bgc->gc.dbg_show = NULL; + bgc->gc.base = pdata->gpio_base; + bgc->gc.ngpio = pdata->nr_pins; + bgc->gc.can_sleep = false; + + tgpio->gpio = bgc->gc; + err = gpiochip_add(&bgc->gc); if (err) return err;