From patchwork Wed Mar 10 12:54:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= X-Patchwork-Id: 397912 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3717FC15509 for ; Wed, 10 Mar 2021 12:56:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 164A364F25 for ; Wed, 10 Mar 2021 12:56:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232808AbhCJMzi (ORCPT ); Wed, 10 Mar 2021 07:55:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232670AbhCJMzQ (ORCPT ); Wed, 10 Mar 2021 07:55:16 -0500 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4647EC061760; Wed, 10 Mar 2021 04:55:16 -0800 (PST) Received: by mail-wr1-x42a.google.com with SMTP id d15so23211952wrv.5; Wed, 10 Mar 2021 04:55:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=qHmhpHiEYSOlfsyvaela5B/sLL5CXocifjQiE8BoNHc=; b=cX8HUhyAwSX5ssRbtOp+A9rqbawphKxHceah7wycaAL9vDEFGSRvAwrjn/Yo8nHPt0 ZrvtmPMOhWL6lCdRHhSt+Tu4XchMqs0BL7mgeunwu9A9BryY22rDSK5gBwDVVwqKarLM do3M7qhog95ItLdnbABOkXOz3nnqWDk8YzNYWWmI42Vwa0xIoKhZUPQ1+07KXrKfgBPN 9L6yZGapgyxuLA6u2OHUn+cFbmkdByoukMPbqHYvjG7fJzRsE3TJeMvzZsT2MHI5ZlP4 IjOj8F3tHhJa9VGQIROocdRw3E0QHeqU6PxJaGq5O6D0XNh8ZcjwHfPvvLAuJrnZRt5k DZAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qHmhpHiEYSOlfsyvaela5B/sLL5CXocifjQiE8BoNHc=; b=gvQjHP3RWPSdX9hVhqed48SEHGwRCafAtfnsSt+DD8eXakc+YntUQucoX7WMjkaDsa vkDswp533Au+6vet+qeHdBxLDRw5wiCnWZsirzz84KC6cO2eijqi9wfJLKvKhOYIeVWM QBSOx5zvRcuRnSyigQ93wwDSsRID/TKKyUtuS4WTkLhp0fPZOmK+Sp8zZfoqooGMV0lm LRWXAiIpfFg/akDKrpP5DJctdC/Bx/YWwcuzljtPAcgHvVPDPrskp55Me+J4J45k/uC3 8I65AxBcKp6xYHzfdpYVLI6pBi8DXCCVOBMn2zuyysAVHuj7A5CEYm4DgxBNdUaPgf3L 4Y9A== X-Gm-Message-State: AOAM5318+Fwrh4lAvgL58ho1Hj94xH7WOh5IHaiaxDs5JDY5Zv8ywRPm wUeF2yXvPDXfmT8jagOWp1hJLpMhkky4cA== X-Google-Smtp-Source: ABdhPJw8j6gxgXJDTvot0Trqwd7nub5ztT0cXx1lBvei8mRlMPSqWV4+NcGKwz0ujtwsYrqBaUuYDg== X-Received: by 2002:adf:ec83:: with SMTP id z3mr3353034wrn.59.1615380915031; Wed, 10 Mar 2021 04:55:15 -0800 (PST) Received: from skynet.lan ([80.31.204.166]) by smtp.gmail.com with ESMTPSA id v6sm29403398wrx.32.2021.03.10.04.55.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 04:55:14 -0800 (PST) From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= To: Linus Walleij , Rob Herring , Michael Walle , Bartosz Golaszewski , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, Jonas Gorski , =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= , Necip Fazil Yildiran , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 10/15] dt-bindings: add BCM6368 pincontroller binding documentation Date: Wed, 10 Mar 2021 13:54:58 +0100 Message-Id: <20210310125504.31886-11-noltari@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310125504.31886-1-noltari@gmail.com> References: <20210310125504.31886-1-noltari@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add binding documentation for the pincontrol core found in BCM6368 SoCs. Signed-off-by: Jonas Gorski Co-developed-by: Jonas Gorski Signed-off-by: Álvaro Fernández Rojas --- v6: add changes suggested by Rob Herring v5: change Documentation to dt-bindings in commit title v4: no changes v3: add new gpio node v2: remove interrupts .../pinctrl/brcm,bcm6368-pinctrl.yaml | 264 ++++++++++++++++++ 1 file changed, 264 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml new file mode 100644 index 000000000000..de0e4e549f9e --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml @@ -0,0 +1,264 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6368 pin controller + +maintainers: + - Álvaro Fernández Rojas + - Jonas Gorski + +description: |+ + The pin controller node should be the child of a syscon node. + + Refer to the the bindings described in + Documentation/devicetree/bindings/mfd/syscon.yaml + +properties: + compatible: + const: brcm,bcm6368-pinctrl + + gpio: + type: object + properties: + compatible: + const: brcm,bcm6368-gpio + + data: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Offset in the register map for the data register (in bytes). + + dirout: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Offset in the register map for the dirout register (in bytes). + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: + maxItems: 1 + + required: + - gpio-controller + - gpio-ranges + - '#gpio-cells' + + additionalProperties: false + +patternProperties: + '^.*-pins$': + if: + type: object + then: + properties: + function: + $ref: "pinmux-node.yaml#/properties/function" + enum: [ analog_afe_0, analog_afe_1, sys_irq, serial_led_data, + serial_led_clk, inet_led, ephy0_led, ephy1_led, ephy2_led, + ephy3_led, robosw_led_data, robosw_led_clk, robosw_led0, + robosw_led1, usb_device_led, pci_req1, pci_gnt1, pci_intb, + pci_req0, pci_gnt0, pcmcia_cd1, pcmcia_cd2, pcmcia_vs1, + pcmcia_vs2, ebi_cs2, ebi_cs3, spi_cs2, spi_cs3, spi_cs4, + spi_cs5, uart1 ] + + pins: + $ref: "pinmux-node.yaml#/properties/pins" + enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, + gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14, + gpio16, gpio17, gpio18, gpio19, gpio20, gpio22, gpio23, + gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30, + gpio31, uart1_grp ] + +required: + - compatible + - gpio + +additionalProperties: false + +examples: + - | + gpio_cntl@10000080 { + compatible = "brcm,bcm6368-gpio-controller", "syscon", "simple-mfd"; + reg = <0x10000080 0x80>; + + pinctrl: pinctrl { + compatible = "brcm,bcm6368-pinctrl"; + + gpio { + compatible = "brcm,bcm6368-gpio"; + data = <0xc>; + dirout = <0x4>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 38>; + #gpio-cells = <2>; + }; + + pinctrl_analog_afe_0: analog_afe_0-pins { + function = "analog_afe_0"; + pins = "gpio0"; + }; + + pinctrl_analog_afe_1: analog_afe_1-pins { + function = "analog_afe_1"; + pins = "gpio1"; + }; + + pinctrl_sys_irq: sys_irq-pins { + function = "sys_irq"; + pins = "gpio2"; + }; + + pinctrl_serial_led: serial_led-pins { + pinctrl_serial_led_data: serial_led_data-pins { + function = "serial_led_data"; + pins = "gpio3"; + }; + + pinctrl_serial_led_clk: serial_led_clk-pins { + function = "serial_led_clk"; + pins = "gpio4"; + }; + }; + + pinctrl_inet_led: inet_led-pins { + function = "inet_led"; + pins = "gpio5"; + }; + + pinctrl_ephy0_led: ephy0_led-pins { + function = "ephy0_led"; + pins = "gpio6"; + }; + + pinctrl_ephy1_led: ephy1_led-pins { + function = "ephy1_led"; + pins = "gpio7"; + }; + + pinctrl_ephy2_led: ephy2_led-pins { + function = "ephy2_led"; + pins = "gpio8"; + }; + + pinctrl_ephy3_led: ephy3_led-pins { + function = "ephy3_led"; + pins = "gpio9"; + }; + + pinctrl_robosw_led_data: robosw_led_data-pins { + function = "robosw_led_data"; + pins = "gpio10"; + }; + + pinctrl_robosw_led_clk: robosw_led_clk-pins { + function = "robosw_led_clk"; + pins = "gpio11"; + }; + + pinctrl_robosw_led0: robosw_led0-pins { + function = "robosw_led0"; + pins = "gpio12"; + }; + + pinctrl_robosw_led1: robosw_led1-pins { + function = "robosw_led1"; + pins = "gpio13"; + }; + + pinctrl_usb_device_led: usb_device_led-pins { + function = "usb_device_led"; + pins = "gpio14"; + }; + + pinctrl_pci: pci-pins { + pinctrl_pci_req1: pci_req1-pins { + function = "pci_req1"; + pins = "gpio16"; + }; + + pinctrl_pci_gnt1: pci_gnt1-pins { + function = "pci_gnt1"; + pins = "gpio17"; + }; + + pinctrl_pci_intb: pci_intb-pins { + function = "pci_intb"; + pins = "gpio18"; + }; + + pinctrl_pci_req0: pci_req0-pins { + function = "pci_req0"; + pins = "gpio19"; + }; + + pinctrl_pci_gnt0: pci_gnt0-pins { + function = "pci_gnt0"; + pins = "gpio20"; + }; + }; + + pinctrl_pcmcia: pcmcia-pins { + pinctrl_pcmcia_cd1: pcmcia_cd1-pins { + function = "pcmcia_cd1"; + pins = "gpio22"; + }; + + pinctrl_pcmcia_cd2: pcmcia_cd2-pins { + function = "pcmcia_cd2"; + pins = "gpio23"; + }; + + pinctrl_pcmcia_vs1: pcmcia_vs1-pins { + function = "pcmcia_vs1"; + pins = "gpio24"; + }; + + pinctrl_pcmcia_vs2: pcmcia_vs2-pins { + function = "pcmcia_vs2"; + pins = "gpio25"; + }; + }; + + pinctrl_ebi_cs2: ebi_cs2-pins { + function = "ebi_cs2"; + pins = "gpio26"; + }; + + pinctrl_ebi_cs3: ebi_cs3-pins { + function = "ebi_cs3"; + pins = "gpio27"; + }; + + pinctrl_spi_cs2: spi_cs2-pins { + function = "spi_cs2"; + pins = "gpio28"; + }; + + pinctrl_spi_cs3: spi_cs3-pins { + function = "spi_cs3"; + pins = "gpio29"; + }; + + pinctrl_spi_cs4: spi_cs4-pins { + function = "spi_cs4"; + pins = "gpio30"; + }; + + pinctrl_spi_cs5: spi_cs5-pins { + function = "spi_cs5"; + pins = "gpio31"; + }; + + pinctrl_uart1: uart1-pins { + function = "uart1"; + group = "uart1_grp"; + }; + }; + };