| Message ID | 1615476112-113101-2-git-send-email-zhouyanjie@wanyeetech.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Fix bugs and add support for new Ingenic SoCs. | expand |
Hi, Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> a écrit : > The MII group of JZ4770's MAC should have 7 pins, add missing > pins to the MII group. > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> No Fixes: tag? And if the bug wasn't introduced in 5.12-rc1 you'll need to Cc linux-stable as well. > --- > > Notes: > v2: > New patch. > > drivers/pinctrl/pinctrl-ingenic.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/pinctrl-ingenic.c > b/drivers/pinctrl/pinctrl-ingenic.c > index f274612..05dfa0a 100644 > --- a/drivers/pinctrl/pinctrl-ingenic.c > +++ b/drivers/pinctrl/pinctrl-ingenic.c > @@ -667,7 +667,9 @@ static int jz4770_pwm_pwm7_pins[] = { 0x6b, }; > static int jz4770_mac_rmii_pins[] = { > 0xa9, 0xab, 0xaa, 0xac, 0xa5, 0xa4, 0xad, 0xae, 0xa6, 0xa8, > }; > -static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, }; > +static int jz4770_mac_mii_pins[] = { > + 0x7b, 0x7a, 0x7d, 0x7c, 0xa7, 0x24, 0xaf, Maybe list them in order? And are you sure that's the whole list? The PM (section 12.2 in jz4770_pm_part3.pdf) lists more pins. Cheers, -Paul > +}; > > static const struct group_desc jz4770_groups[] = { > INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0), > -- > 2.7.4 >
Hi Paul, On 2021/3/12 下午9:05, Paul Cercueil wrote: > Hi, > > Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie) > <zhouyanjie@wanyeetech.com> a écrit : >> The MII group of JZ4770's MAC should have 7 pins, add missing >> pins to the MII group. >> >> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > No Fixes: tag? > And if the bug wasn't introduced in 5.12-rc1 you'll need to Cc > linux-stable as well. > Sure, I will add it. >> --- >> >> Notes: >> v2: >> New patch. >> >> drivers/pinctrl/pinctrl-ingenic.c | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/pinctrl/pinctrl-ingenic.c >> b/drivers/pinctrl/pinctrl-ingenic.c >> index f274612..05dfa0a 100644 >> --- a/drivers/pinctrl/pinctrl-ingenic.c >> +++ b/drivers/pinctrl/pinctrl-ingenic.c >> @@ -667,7 +667,9 @@ static int jz4770_pwm_pwm7_pins[] = { 0x6b, }; >> static int jz4770_mac_rmii_pins[] = { >> 0xa9, 0xab, 0xaa, 0xac, 0xa5, 0xa4, 0xad, 0xae, 0xa6, 0xa8, >> }; >> -static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, }; >> +static int jz4770_mac_mii_pins[] = { >> + 0x7b, 0x7a, 0x7d, 0x7c, 0xa7, 0x24, 0xaf, > > Maybe list them in order? > I ordered them in the order of rxd3, rxd2, txd3, txd2, rxclk, crs, col. > And are you sure that's the whole list? The PM (section 12.2 in > jz4770_pm_part3.pdf) lists more pins. > Here is the way to imitate the MMC. Use only RMII group when using RMII function, use both RMII and MII groups when using MII function. If you think it is necessary, I can redefine the MII group. Thanks and best regards! > Cheers, > -Paul > >> +}; >> >> static const struct group_desc jz4770_groups[] = { >> INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0), >> -- >> 2.7.4 >> >
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index f274612..05dfa0a 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -667,7 +667,9 @@ static int jz4770_pwm_pwm7_pins[] = { 0x6b, }; static int jz4770_mac_rmii_pins[] = { 0xa9, 0xab, 0xaa, 0xac, 0xa5, 0xa4, 0xad, 0xae, 0xa6, 0xa8, }; -static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, }; +static int jz4770_mac_mii_pins[] = { + 0x7b, 0x7a, 0x7d, 0x7c, 0xa7, 0x24, 0xaf, +}; static const struct group_desc jz4770_groups[] = { INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0),
The MII group of JZ4770's MAC should have 7 pins, add missing pins to the MII group. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> --- Notes: v2: New patch. drivers/pinctrl/pinctrl-ingenic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)