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[1/2] drm/msm: Fix a5xx/a6xx timestamps

Message ID 20210325012358.1759770-2-robdclark@gmail.com
State New
Headers show
Series drm/msm: Fixes/updates for perfetto profiling | expand

Commit Message

Rob Clark March 25, 2021, 1:23 a.m. UTC
From: Rob Clark <robdclark@chromium.org>

They were reading a counter that was configured to ALWAYS_COUNT (ie.
cycles that the GPU is doing something) rather than ALWAYS_ON.  This
isn't the thing that userspace is looking for.

Signed-off-by: Rob Clark <robdclark@chromium.org>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++--
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Jordan Crouse April 2, 2021, 2:50 p.m. UTC | #1
On Wed, Mar 24, 2021 at 06:23:52PM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>

> 

> They were reading a counter that was configured to ALWAYS_COUNT (ie.

> cycles that the GPU is doing something) rather than ALWAYS_ON.  This

> isn't the thing that userspace is looking for.


Acked-by: Jordan Crouse <jordan@cosmicpenguin.net>


> Signed-off-by: Rob Clark <robdclark@chromium.org>

> ---

>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++--

>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++--

>  2 files changed, 4 insertions(+), 4 deletions(-)

> 

> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c

> index a5af223eaf50..bb82fcd9df81 100644

> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c

> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c

> @@ -1241,8 +1241,8 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)

>  

>  static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

>  {

> -	*value = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_CP_0_LO,

> -		REG_A5XX_RBBM_PERFCTR_CP_0_HI);

> +	*value = gpu_read64(gpu, REG_A5XX_RBBM_ALWAYSON_COUNTER_LO,

> +		REG_A5XX_RBBM_ALWAYSON_COUNTER_HI);

>  

>  	return 0;

>  }

> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c

> index 130661898546..59718c304488 100644

> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c

> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c

> @@ -1173,8 +1173,8 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

>  	/* Force the GPU power on so we can read this register */

>  	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);

>  

> -	*value = gpu_read64(gpu, REG_A6XX_RBBM_PERFCTR_CP_0_LO,

> -		REG_A6XX_RBBM_PERFCTR_CP_0_HI);

> +	*value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER_LO,

> +		REG_A6XX_CP_ALWAYS_ON_COUNTER_HI);

>  

>  	a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);

>  	return 0;

> -- 

> 2.29.2

> 

> _______________________________________________

> Freedreno mailing list

> Freedreno@lists.freedesktop.org

> https://lists.freedesktop.org/mailman/listinfo/freedreno
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index a5af223eaf50..bb82fcd9df81 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1241,8 +1241,8 @@  static int a5xx_pm_suspend(struct msm_gpu *gpu)
 
 static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
 {
-	*value = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_CP_0_LO,
-		REG_A5XX_RBBM_PERFCTR_CP_0_HI);
+	*value = gpu_read64(gpu, REG_A5XX_RBBM_ALWAYSON_COUNTER_LO,
+		REG_A5XX_RBBM_ALWAYSON_COUNTER_HI);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 130661898546..59718c304488 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1173,8 +1173,8 @@  static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
 	/* Force the GPU power on so we can read this register */
 	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);
 
-	*value = gpu_read64(gpu, REG_A6XX_RBBM_PERFCTR_CP_0_LO,
-		REG_A6XX_RBBM_PERFCTR_CP_0_HI);
+	*value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER_LO,
+		REG_A6XX_CP_ALWAYS_ON_COUNTER_HI);
 
 	a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);
 	return 0;