@@ -20,7 +20,6 @@
enum {
P_BI_TCXO,
- P_CORE_BI_PLL_TEST_SE,
P_VIDEO_PLL0_OUT_EVEN,
P_VIDEO_PLL0_OUT_MAIN,
P_VIDEO_PLL0_OUT_ODD,
@@ -51,7 +50,6 @@ static const struct parent_map video_cc_parent_map_0[] = {
{ P_VIDEO_PLL0_OUT_MAIN, 1 },
{ P_VIDEO_PLL0_OUT_EVEN, 2 },
{ P_VIDEO_PLL0_OUT_ODD, 3 },
- { P_CORE_BI_PLL_TEST_SE, 4 },
};
static const struct clk_parent_data video_cc_parent_data_0[] = {
@@ -59,7 +57,6 @@ static const struct clk_parent_data video_cc_parent_data_0[] = {
{ .hw = &video_pll0.clkr.hw },
{ .name = "video_pll0_out_even" },
{ .name = "video_pll0_out_odd" },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = {
@@ -81,7 +78,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "video_cc_venus_clk_src",
.parent_data = video_cc_parent_data_0,
- .num_parents = 5,
+ .num_parents = 4,
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_shared_ops,
},
The test clock isn't in the bindings and apparently it's not used by anyone upstream. Remove it. Suggested-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/videocc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2