| Message ID | 20210406113306.2633595-6-xiaoning.wang@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | i2c: imx-lpi2c: New features and bug fixes | expand |
On Tue, Apr 06, 2021 at 07:32:53PM +0800, Clark Wang wrote: > The lpi2c driver has add the missing ipg clock. > So add the ipg clock here for all lpi2c nodes. > > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Historically, we use 'arm64: dts: ...' as subject prefix for arm64 DTS patch, and 'ARM: dts: ...' for arm. Shawn > --- > V2 changes: > - New patch added in V2 > --- > .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 24 ++++++++++++------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > index 960a802b8b6e..b5ed12a06538 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > @@ -111,8 +111,10 @@ uart3_lpcg: clock-controller@5a490000 { > i2c0: i2c@5a800000 { > reg = <0x5a800000 0x4000>; > interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; > + clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>, > + <&i2c0_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_0>; > @@ -122,8 +124,10 @@ i2c0: i2c@5a800000 { > i2c1: i2c@5a810000 { > reg = <0x5a810000 0x4000>; > interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; > + clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>, > + <&i2c1_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_1>; > @@ -133,8 +137,10 @@ i2c1: i2c@5a810000 { > i2c2: i2c@5a820000 { > reg = <0x5a820000 0x4000>; > interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; > + clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>, > + <&i2c2_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_2>; > @@ -144,8 +150,10 @@ i2c2: i2c@5a820000 { > i2c3: i2c@5a830000 { > reg = <0x5a830000 0x4000>; > interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; > + clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>, > + <&i2c3_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_3>; > -- > 2.25.1 >
> From: Clark Wang <xiaoning.wang@nxp.com> > Sent: Tuesday, April 6, 2021 7:33 PM > > The lpi2c driver has add the missing ipg clock. > So add the ipg clock here for all lpi2c nodes. > > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> > --- > V2 changes: > - New patch added in V2 > --- > .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 24 ++++++++++++------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > index 960a802b8b6e..b5ed12a06538 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > @@ -111,8 +111,10 @@ uart3_lpcg: clock-controller@5a490000 { > i2c0: i2c@5a800000 { > reg = <0x5a800000 0x4000>; > interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; Added by mistake? > + clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>, > + <&i2c0_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_0>; @@ -122,8 +124,10 @@ > i2c0: i2c@5a800000 { > i2c1: i2c@5a810000 { > reg = <0x5a810000 0x4000>; > interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; Ditto > + clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>, > + <&i2c1_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_1>; @@ -133,8 +137,10 @@ > i2c1: i2c@5a810000 { > i2c2: i2c@5a820000 { > reg = <0x5a820000 0x4000>; > interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; > + clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>, > + <&i2c2_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_2>; @@ -144,8 +150,10 @@ > i2c2: i2c@5a820000 { > i2c3: i2c@5a830000 { > reg = <0x5a830000 0x4000>; > interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>; > - clock-names = "per"; > + interrupt-parent = <&gic>; > + clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>, > + <&i2c3_lpcg IMX_LPCG_CLK_4>; > + clock-names = "per", "ipg"; > assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>; > assigned-clock-rates = <24000000>; > power-domains = <&pd IMX_SC_R_I2C_3>; > -- > 2.25.1
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 960a802b8b6e..b5ed12a06538 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -111,8 +111,10 @@ uart3_lpcg: clock-controller@5a490000 { i2c0: i2c@5a800000 { reg = <0x5a800000 0x4000>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>, + <&i2c0_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_0>; @@ -122,8 +124,10 @@ i2c0: i2c@5a800000 { i2c1: i2c@5a810000 { reg = <0x5a810000 0x4000>; interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>, + <&i2c1_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_1>; @@ -133,8 +137,10 @@ i2c1: i2c@5a810000 { i2c2: i2c@5a820000 { reg = <0x5a820000 0x4000>; interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>, + <&i2c2_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_2>; @@ -144,8 +150,10 @@ i2c2: i2c@5a820000 { i2c3: i2c@5a830000 { reg = <0x5a830000 0x4000>; interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>, + <&i2c3_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_3>;
The lpi2c driver has add the missing ipg clock. So add the ipg clock here for all lpi2c nodes. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> --- V2 changes: - New patch added in V2 --- .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 24 ++++++++++++------- 1 file changed, 16 insertions(+), 8 deletions(-)