From patchwork Mon Apr 12 12:13:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 419551 Delivered-To: patch@linaro.org Received: by 2002:a02:c4d2:0:0:0:0:0 with SMTP id h18csp1665938jaj; Mon, 12 Apr 2021 04:53:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzLsyJq1cCL3jvyVZIfTRwhY1Xe0SNRTYFxJZxH7biXx15nDUDMfmQztB9U4SCeWqXInqQl X-Received: by 2002:a17:907:33cb:: with SMTP id zk11mr10333541ejb.231.1618228436728; Mon, 12 Apr 2021 04:53:56 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1618228436; cv=pass; d=google.com; s=arc-20160816; b=zon9ixSfaKBrDq/p8qUkXWPRpBvSwuxwKUpBtKKjmMvUeMzS80WiT6HE3y6XalGPzY EVs5wSnEvdvIEaPe23i0/hsCxMiPHDYfZ67JSCXKGshQQDVTSAJNmGcbCEdcafEmrpjP ck/lk1TJf2E2d2hYg+tqfBoCyNkR8erCmOjxajbbEHqersy8QcjQ/dbDi7mJ3zdmAIAh km0v6lKE78mAyYphfKtrxzXAozL/nfmHvIB4h8nsbcYnVjZshkLreOKR5kLSY+1ojvU0 7sp4S0KuSRsm20dPcV+MnKzDrkPQwk0zGKjTNgbWPmsda2vFoxMZrp+oBd92/RFf98zD srBg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mime-version :content-transfer-encoding:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=p0c5raBf4+C1axcyE2tPNg88mvJCh6BoMw+CDbPRSmg=; b=mq9iC8Qymby5jhtoZ6yY7GE53HL/k2rb01Vjts24JX2WO9Ku8N8GdhNBm9Nctse6ub iVTfdOmvZoDM2WAybO0R0uP3Wimf87W8jv4XJlcudnH8hMoWWkyzMafQCv5QRiUFHH1Q EJ/vhsmIEp8ZYoamRsCthjjbM/fTcLF5k7U5IsYKrdkSAzbapSoYvxydE6OVPGur0JVU dc2ISV8d11qzV9wOwsRTraNWAcVRCh+rWQL1pqfl0hjyDYjJ7qQ/J5eJc6wqK0Fhi/Ti H7m8UWTlb46wQ7c4r/yxQlEnaLwnURgfYjeBgocSiDDr1w1xJrEooGZ0JB7EfVEOfC5Z 1YNA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=Z9Y+xNcH; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from phobos.denx.de (phobos.denx.de. [2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id u3si7803957eds.244.2021.04.12.04.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Apr 2021 04:53:56 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; dkim=pass header.i=@NXP1.onmicrosoft.com header.s=selector2-NXP1-onmicrosoft-com header.b=Z9Y+xNcH; arc=pass (i=1 spf=pass spfdomain=oss.nxp.com dkim=pass dkdomain=oss.nxp.com dmarc=pass fromdomain=oss.nxp.com); spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 982B582033; Mon, 12 Apr 2021 13:53:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=oss.nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="Z9Y+xNcH"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8D61B81FAB; Mon, 12 Apr 2021 13:52:27 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on060f.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe0d::60f]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 889FD82083 for ; Mon, 12 Apr 2021 13:42:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=oss.nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@oss.nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Dm1AdUZIuzMOJouFK5Cubjx+hUZ5wmsXY8j2YZA0q/zQXWT2zfz0x14pO2kaWbUWiq+xH9EBRftMrID23vzJtwPRA6wKUgsUfVIpRLMWNQ0tvD3KSDBNJy//aBGC3gjU6xUOKBkrKpSwVxxOoqtHYcbTdrW/vt3jbBkw17Ma8aeVJA25Q3bX/4W25HB9MBauKXXtJKR3bPktDiPi5IKCpOMRzVI/0qd9jAP+7K6nsYcUshzuoOROHQEfxPYRcMomMISsNv6mLfD5JYWBLemK2qGjORWJHAU+pHZ6KvU+DPNBuNh6QbOu+bops0bDpA3+hqk/R4VcaGG4GIRECLxZsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=p0c5raBf4+C1axcyE2tPNg88mvJCh6BoMw+CDbPRSmg=; b=fNPkzps5qBJ1PQWTYyJ7Bsx1pH2zYTRso65U/xf7KTjyAeT/4nvJ2mfY3JLoMdbJFH+N33DB3zHtvnQOUZ+6JBkLOhp6/iTeBW5ueFBiI55O8ZiYVPji00TXjbolk8nwoOte+0+bNlVDqEIXZy7JI6V6sbUj75YW5RxaAk6KF2vnNwKa8VzTX1lhIzz2R69ipWe/gYvIFk+wi60nNAP/+3pSvoHWfRV4V5OYyWGMLij/XwZaGgPGDro7/LeDSDBxJalVlQH1oNfSJNHrmtH8R2PybvH/5an5rYVJMI2Mlf0KVmgJ3gU5KMew6XBoRIR+NVrOMymzPfoPdghhvPqvvw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=p0c5raBf4+C1axcyE2tPNg88mvJCh6BoMw+CDbPRSmg=; b=Z9Y+xNcHzbqv8icsgCyTA4qtQbsUIR8HuighvbafwFWuHIRXV0cVuT99FgCwbx03mBkZyGNiXU9VwMdjSRX+gissVYyJTrNjcCeC8SnW9OWKoI8/2vwxiHaKc+Dz2AfAqFgjfE2LvqYvMF8/wQQljWp8oYVO/kFirkFYNMObp8c= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none; denx.de; dmarc=none action=none header.from=oss.nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DBBPR04MB7595.eurprd04.prod.outlook.com (2603:10a6:10:20d::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4020.22; Mon, 12 Apr 2021 11:42:57 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::c57a:6964:f72c:21cf]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::c57a:6964:f72c:21cf%11]) with mapi id 15.20.3999.032; Mon, 12 Apr 2021 11:42:57 +0000 From: "Peng Fan (OSS)" To: sbabic@denx.de, festevam@gmail.com Cc: u-boot@lists.denx.de, uboot-imx@nxp.com, Peng Fan Subject: [PATCH 34/37] arm: imx8ulp: add iomuxc support Date: Mon, 12 Apr 2021 20:13:03 +0800 Message-Id: <20210412121306.11484-35-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210412121306.11484-1-peng.fan@oss.nxp.com> References: <20210412121306.11484-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: HK2PR0401CA0009.apcprd04.prod.outlook.com (2603:1096:202:2::19) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by HK2PR0401CA0009.apcprd04.prod.outlook.com (2603:1096:202:2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4020.16 via Frontend Transport; Mon, 12 Apr 2021 11:42:55 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4e7c4531-6f1f-4e82-5845-08d8fda81e12 X-MS-TrafficTypeDiagnostic: DBBPR04MB7595: X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1332; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0d/ghOeV1Xuk82Q5+9x3mnkMfyBVsJA2jTe6sgtmGSy/ElMhosb68mQTxUE8IY1d46lQLqdOgCZ0CQ0KK0pXci9dGiyp5vT4A2gBwm+O2KF8vtHvZuijQziqFbKxbMmmNeudVJuhCiOzqT2+T4rW0YN94DQIfZDX2u9WSaYYPLDsTyZczpPMI8afZXthydk1f22L2XLxwNCrHhx4WxE+ykqNquq9rPELFY7tvyOAzL1m1LGYiMC+Q6NdKPNeMb3Or7GSWZXXuLhtf3iliOV+XI1jr/IdID7Qm1rJ22EThl4kyhHCETPRCIRFri6WR5Sx7uU2HK7zQBR2iqX9iMIR5DloJ4Xl0R1N6Fiqis4/DvMGUXio+Mz8omgU54MtXqmhX3X0LIi6rlSHgz3A94eCj1dAwCE6CitsnCw46lbVGzT4CXghcr12VrubjOlZmyNqz0/Mk/+B3uKseNNoWhhYSVb+i3U80vU2UoJuH27f3UFZypyKraqEIZsTW2sY4nmmyHL5LtwjptH3AjQkWtlu3Ms3sl9Bg9EhhUEaQwlxYE4qfeLMslpAI3J41+XyiwF5qzwmsRjaSQi9ynFa6DUPhOESF0/pHP/RY7QXWWyAHnuc11MQV3XYIIlLEN7sxgQK0BbuBQE0RHQ2Z+Gxg9IkFMomTKuZvHtXIpiG4PiiZqI= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(396003)(366004)(136003)(376002)(346002)(39860400002)(38100700002)(4326008)(6506007)(38350700002)(316002)(26005)(2616005)(86362001)(186003)(956004)(52116002)(478600001)(2906002)(8676002)(1076003)(6512007)(83380400001)(66476007)(5660300002)(66556008)(8936002)(6666004)(16526019)(66946007)(6486002)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: N/Gc2YHo5jmrjUTq2zoCeip7pj+DwA5x7AoW1pR60diB3tVMOFkL0eL/qMwciXNOYF9fBBG3XkN63xveMneSrrB4Xg1n5S4u7yLvOEJ69txT8qecKYyg4JtESHHP9pFFR8Q+/JhP2S4PgBuhhJUBtwLbrhkJMREB9LZYbuP28azXHoAhhd9fjb8iDFiGTFqHcqj2JEaEy9sacDWzXWNVWbo6pszlTFVPl++aIsdLiRbRsj1fPVxzJPD5d4i9xQCqRdbJP5OrZ2Ye0XpdwGEF6Bl5tGmf+1OTJ6NUiZuxHVb7FbP8yWEZJgT3rHOuBTraiVw4OG/Cn+5rZLSvwrY/4VDj78TJIIgda0J5NJXBdpPW+eiEc8YoFbhdHmHwjIEnWYS0WITxiwmaIVebI+F3oFs2oPS09Y3njGRP3pUViOL0O7I0gn8LavtXl2xE8+q72kpKnz//mJsRCDfLDpnMC7ygRvCkurEnPzq9eZNq97X3wAyIzKgatz8+WGmehfrttzXPcUgSaY078OBvCX9qbHQkSzdr2Acb2zf2IXT+6SES5wIhcqvLSa+zgByhSuiL9or+O8T/J9CpjzCV/0WKRaTDjAzygy4ezjlYEffo+Do4XWNTheEUbBI9BsXbUIuxzNfjpHoBEVWf1t9rgKvM+GGP+QHi8en1O6QzCQZsyR1RFPMMR54TvwOzHyUnd4YXgxuTxFgGgI1eE8XX0ZGo2SADnhHePsu+aC+iIfenWjArj7Gm/gWzgNWqgYwBRMHdNDxo2TCe+mIXTUC+YETn67pofBlWoFdnW3xUielvBFfTPyjl4htFeYD0fHpWpkRauh1rUXwTKW0oxerveTeXnrAvEWMI603lXvt4Bho6JPNeywwlsy4GY2W5Ns46ErmC7b1bkl8I2YJTTj0KSGH9XYq+ymxH7eiIqejGMCs25PJOr3U9UWWO/gApP10esfZj8e9GCidKRIrK+DMMNcGsmdHDGOwhA8T5T9dA6NVjkav8o43lPx2lQrJbfY1jE9aGTP6eMIvoB9ZuUcvlICWBhau7wuqG4cJG33Y74I2i3C1e3f32IvVFL19t1DwqCiB1cMWOoHaPoAOQK6RQsG0fNtmpZgMeBQNTT8R+I0fpuPx/8tCq8Hv79UwmVeiReaKhBrbCmj3O0N9ZxkFqJrrxC49Cnrr+PCrb3xkv+wlKw9AglUoPvY0g/dgWaEyir8+X/uke5C0mnmu/ZJj37zEnlEJzYtwG6QvnM4L843oriUVQoVOJjFBn+95MKejrCphtvYaFXAaZ1DngOnej/GpaVm3YqVEXQA6jN019M610NKjFBvL6U56wVhlUKOBe8P+u X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4e7c4531-6f1f-4e82-5845-08d8fda81e12 X-MS-Exchange-CrossTenant-AuthSource: DB6PR0402MB2760.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Apr 2021 11:42:57.5436 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: sXrJkugYLaYPwPBGxetvrzkkF/BQldYmUdzcllCpeotPJYxfjKGV6S5gFxVdLnqwDg0GALQemEoa9zpUzCJKag== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR04MB7595 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: Peng Fan Add i.MX8ULP iomuxc support Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/iomux.h | 82 +++++++++++++++++++++++ arch/arm/mach-imx/imx8ulp/iomux.c | 63 ++++++++++++++++- 2 files changed, 144 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-imx8ulp/iomux.h -- 2.30.0 diff --git a/arch/arm/include/asm/arch-imx8ulp/iomux.h b/arch/arm/include/asm/arch-imx8ulp/iomux.h new file mode 100644 index 0000000000..3c8f2e067e --- /dev/null +++ b/arch/arm/include/asm/arch-imx8ulp/iomux.h @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 NXP + */ + +#ifndef __MACH_IMX8ULP_IOMUX_H__ +#define __MACH_IMX8ULP_IOMUX_H__ + +typedef u64 iomux_cfg_t; + +#define MUX_CTRL_OFS_SHIFT 0 +#define MUX_CTRL_OFS_MASK ((iomux_cfg_t)0xffff << MUX_CTRL_OFS_SHIFT) +#define MUX_SEL_INPUT_OFS_SHIFT 16 +#define MUX_SEL_INPUT_OFS_MASK ((iomux_cfg_t)0xffff << MUX_SEL_INPUT_OFS_SHIFT) + +#define MUX_MODE_SHIFT 32 +#define MUX_MODE_MASK ((iomux_cfg_t)0x3f << MUX_MODE_SHIFT) +#define MUX_SEL_INPUT_SHIFT 38 +#define MUX_SEL_INPUT_MASK ((iomux_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) +#define MUX_PAD_CTRL_SHIFT 42 +#define MUX_PAD_CTRL_MASK ((iomux_cfg_t)0x7ffff << MUX_PAD_CTRL_SHIFT) + +#define MUX_PAD_CTRL(x) ((iomux_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) + +#define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, sel_input, pad_ctrl) \ + (((iomux_cfg_t)(mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) | \ + ((iomux_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \ + ((iomux_cfg_t)(pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \ + ((iomux_cfg_t)(sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT) | \ + ((iomux_cfg_t)(sel_input) << MUX_SEL_INPUT_SHIFT)) + +#define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(pad)) + +#define IOMUX_CONFIG_MPORTS 0x20 +#define MUX_MODE_MPORTS ((iomux_v3_cfg_t)IOMUX_CONFIG_MPORTS << \ MUX_MODE_SHIFT) + +/* Bit definition below needs to be fixed acccording to ulp rm */ + +#define NO_PAD_CTRL BIT(18) +#define PAD_CTL_OBE_ENABLE BIT(17) +#define PAD_CTL_IBE_ENABLE BIT(16) +#define PAD_CTL_DSE BIT(6) +#define PAD_CTL_ODE BIT(5) +#define PAD_CTL_SRE_FAST (0 << 2) +#define PAD_CTL_SRE_SLOW BIT(2) +#define PAD_CTL_PUE BIT(1) +#define PAD_CTL_PUS_UP (BIT(0) | PAD_CTL_PUE) +#define PAD_CTL_PUS_DOWN ((0 << 0) | PAD_CTL_PUE) + +#define IOMUXC_PCR_MUX_ALT0 (0 << 8) +#define IOMUXC_PCR_MUX_ALT1 (1 << 8) +#define IOMUXC_PCR_MUX_ALT2 (2 << 8) +#define IOMUXC_PCR_MUX_ALT3 (3 << 8) +#define IOMUXC_PCR_MUX_ALT4 (4 << 8) +#define IOMUXC_PCR_MUX_ALT5 (5 << 8) +#define IOMUXC_PCR_MUX_ALT6 (6 << 8) +#define IOMUXC_PCR_MUX_ALT7 (7 << 8) +#define IOMUXC_PCR_MUX_ALT8 (8 << 8) +#define IOMUXC_PCR_MUX_ALT9 (9 << 8) +#define IOMUXC_PCR_MUX_ALT10 (10 << 8) +#define IOMUXC_PCR_MUX_ALT11 (11 << 8) +#define IOMUXC_PCR_MUX_ALT12 (12 << 8) +#define IOMUXC_PCR_MUX_ALT13 (13 << 8) +#define IOMUXC_PCR_MUX_ALT14 (14 << 8) +#define IOMUXC_PCR_MUX_ALT15 (15 << 8) + +#define IOMUXC_PSMI_IMUX_ALT0 (0x0) +#define IOMUXC_PSMI_IMUX_ALT1 (0x1) +#define IOMUXC_PSMI_IMUX_ALT2 (0x2) +#define IOMUXC_PSMI_IMUX_ALT3 (0x3) +#define IOMUXC_PSMI_IMUX_ALT4 (0x4) +#define IOMUXC_PSMI_IMUX_ALT5 (0x5) +#define IOMUXC_PSMI_IMUX_ALT6 (0x6) +#define IOMUXC_PSMI_IMUX_ALT7 (0x7) + +#define IOMUXC_PCR_MUX_ALT_SHIFT (8) +#define IOMUXC_PCR_MUX_ALT_MASK (0xF00) +#define IOMUXC_PSMI_IMUX_ALT_SHIFT (0) + +void imx8ulp_iomux_setup_pad(iomux_cfg_t pad); +void imx8ulp_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, unsigned count); +#endif diff --git a/arch/arm/mach-imx/imx8ulp/iomux.c b/arch/arm/mach-imx/imx8ulp/iomux.c index c52ccdeaea..71a8c59d64 100644 --- a/arch/arm/mach-imx/imx8ulp/iomux.c +++ b/arch/arm/mach-imx/imx8ulp/iomux.c @@ -1,4 +1,65 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ + +#include +#include +#include +#include + +static void *base = (void *)IOMUXC_BASE_ADDR; + +/* + * iomuxc0 base address. In imx7ulp-pins.h, + * the offsets of pins in iomuxc0 are from 0xD000, + * so we set the base address to (0x4103D000 - 0xD000 = 0x41030000) + */ +static void *base_mports = (void *)(0x280A1000); + +/* + * configures a single pad in the iomuxer + */ +void imx8ulp_iomux_setup_pad(iomux_cfg_t pad) +{ + u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT; + u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; + u32 sel_input_ofs = + (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT; + u32 sel_input = + (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT; + u32 pad_ctrl_ofs = mux_ctrl_ofs; + u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; + + + if (mux_mode & IOMUX_CONFIG_MPORTS) { + mux_mode &= ~IOMUX_CONFIG_MPORTS; + base = base_mports; + } else { + base = (void *)IOMUXC_BASE_ADDR; + } + + __raw_writel(((mux_mode << IOMUXC_PCR_MUX_ALT_SHIFT) & + IOMUXC_PCR_MUX_ALT_MASK), base + mux_ctrl_ofs); + + if (sel_input_ofs) + __raw_writel((sel_input << IOMUXC_PSMI_IMUX_ALT_SHIFT), base + sel_input_ofs); + + if (!(pad_ctrl & NO_PAD_CTRL)) + __raw_writel(((mux_mode << IOMUXC_PCR_MUX_ALT_SHIFT) & + IOMUXC_PCR_MUX_ALT_MASK) | + (pad_ctrl & (~IOMUXC_PCR_MUX_ALT_MASK)), + base + pad_ctrl_ofs); +} + +/* configures a list of pads within declared with IOMUX_PADS macro */ +void imx8ulp_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, u32 count) +{ + iomux_cfg_t const *p = pad_list; + int i; + + for (i = 0; i < count; i++) { + imx8ulp_iomux_setup_pad(*p); + p++; + } +}