[ARM,AArch64,testsuite] Fix vaddl and vaddw tests

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Headers	show Return-Path: <patchwork-forward+bncBDNJJ5OM3EFRBZO7Q2SAKGQEW6ABHBI@linaro.org> Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2a00:1450:4010:c04::22f as permitted sender) client-ip=2a00:1450:4010:c04::22f; Received-SPF: pass (google.com: domain of gcc-patches-return-386667-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list Sender: gcc-patches-owner@gcc.gnu.org MIME-Version: 1.0 In-Reply-To: <CAKdteOaDrkXa5dAemrhRcZ4f1WwFuofAKfaOtAA-DXB7Za8Lfw@mail.gmail.com> References: <CAKdteOZX7UH74zOBpE5tT-s6EipBimJ-huKjUtXvBbMSXUZ8dQ@mail.gmail.com> <CAKdteOaDrkXa5dAemrhRcZ4f1WwFuofAKfaOtAA-DXB7Za8Lfw@mail.gmail.com> Date: Fri, 5 Dec 2014 14:14:53 +0100 Message-ID: <CAKdteOY-+wMe=yqdDepeU5qOa+WyXt_ZkrE_KXJeYSZem8cQUg@mail.gmail.com> Subject: Re: [ARM,AArch64][testsuite] Fix vaddl and vaddw tests From: Christophe Lyon <christophe.lyon@linaro.org> To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org> Cc: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>, Marcus Shawcroft <Marcus.Shawcroft@arm.com> Content-Type: multipart/mixed; boundary=001a11c2cd68d14afe050977dcf4

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Date: Fri, 5 Dec 2014 14:14:53 +0100
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Subject: Re: [ARM,AArch64][testsuite] Fix vaddl and vaddw tests
From: Christophe Lyon <christophe.lyon@linaro.org>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
	Marcus Shawcroft <Marcus.Shawcroft@arm.com>
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Commit Message

Christophe Lyon Dec. 5, 2014, 1:14 p.m. UTC

On 3 December 2014 at 17:12, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> On 3 December 2014 at 15:22, Christophe Lyon <christophe.lyon@linaro.org> wrote:
>> Hi,
>>
>> Here is a fix for typos in the AdvSimd intrinsic tests, where vaddl
>> and vaddw didn't actually execute the tests. (The function was
>> declared in main, instead of called).
>>
>> This patch also fixes the expected output for these tests.
>
> And it looks like I'll have to apply the same obvious fix to vaddhn.c
>
Here is the patch to fix the 3 test cases (vaddl, vaddw, vaddhn).
OK?

2014-12-05  Christophe Lyon  <christophe.lyon@linaro.org>

    testsuite/
    * gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Actually execute
    the test.
    * gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Actually execute
    the test. Fix expected output.
    * gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Likewise.


>>
>> OK?
>>
>> Thanks
>> Christophe.
>>
>> 2014-12-03  Christophe Lyon  <christophe.lyon@linaro.org>
>>
>>     testsuite/
>>     * gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Actually execute
>>     the test. Fix expected output.
>>     * gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c
index 74b4b4d..58fd5ea 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c
@@ -52,15 +52,13 @@  VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
 					   0x33333333, 0x33333333 };
 
-#ifndef INSN_NAME
 #define INSN_NAME vaddhn
 #define TEST_MSG "VADDHN"
-#endif
 
-#define FNNAME1(NAME) void exec_ ## NAME (void)
+#define FNNAME1(NAME) exec_ ## NAME
 #define FNNAME(NAME) FNNAME1(NAME)
 
-FNNAME (INSN_NAME)
+void FNNAME (INSN_NAME) (void)
 {
   /* Basic test: vec64=vaddhn(vec128_a, vec128_b), then store the result.  */
 #define TEST_VADDHN1(INSN, T1, T2, W, W2, N)				\
@@ -104,6 +102,6 @@  FNNAME (INSN_NAME)
 
 int main (void)
 {
-  FNNAME (INSN_NAME);
+  FNNAME (INSN_NAME) ();
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c
index 861abec..030785d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c
@@ -5,13 +5,13 @@ 
 /* Expected results.  */
 VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
 				       0x33, 0x33, 0x33, 0x33 };
-VECT_VAR_DECL(expected,int,16,4) [] = { 0x33, 0x33, 0x33, 0x33 };
-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33, 0x33 };
+VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
 VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3, 0x3, 0x3, 0x3,
-					0x3, 0x3, 0x3, 0x3 };
-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x37, 0x37, 0x37, 0x37 };
-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3, 0x3 };
+VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+					0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
 VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
 					0x33, 0x33, 0x33, 0x33 };
@@ -45,15 +45,13 @@  VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
 					   0x33333333, 0x33333333 };
 
-#ifndef INSN_NAME
 #define INSN_NAME vaddl
 #define TEST_MSG "VADDL"
-#endif
 
-#define FNNAME1(NAME) void exec_ ## NAME (void)
+#define FNNAME1(NAME) exec_ ## NAME
 #define FNNAME(NAME) FNNAME1(NAME)
 
-FNNAME (INSN_NAME)
+void FNNAME (INSN_NAME) (void)
 {
   /* Basic test: y=vaddl(x1,x2), then store the result.  */
 #define TEST_VADDL1(INSN, T1, T2, W, W2, N)				\
@@ -117,6 +115,6 @@  FNNAME (INSN_NAME)
 
 int main (void)
 {
-  FNNAME (INSN_NAME);
+  FNNAME (INSN_NAME) ();
   return 0;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c
index 5804cd7..95cbb31 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c
@@ -5,13 +5,13 @@ 
 /* Expected results.  */
 VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
 				       0x33, 0x33, 0x33, 0x33 };
-VECT_VAR_DECL(expected,int,16,4) [] = { 0x33, 0x33, 0x33, 0x33 };
-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33, 0x33 };
+VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
 VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3, 0x3, 0x3, 0x3,
-					0x3, 0x3, 0x3, 0x3 };
-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x37, 0x37, 0x37, 0x37 };
-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3, 0x3 };
+VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+					0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
 VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
 					0x33, 0x33, 0x33, 0x33 };
@@ -45,15 +45,13 @@  VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
 					   0x33333333, 0x33333333 };
 
-#ifndef INSN_NAME
 #define INSN_NAME vaddw
 #define TEST_MSG "VADDW"
-#endif
 
-#define FNNAME1(NAME) void exec_ ## NAME (void)
+#define FNNAME1(NAME) exec_ ## NAME
 #define FNNAME(NAME) FNNAME1(NAME)
 
-FNNAME (INSN_NAME)
+void FNNAME (INSN_NAME) (void)
 {
   /* Basic test: y=vaddw(x1,x2), then store the result.  */
 #define TEST_VADDW1(INSN, T1, T2, W, W2, N)				\
@@ -117,6 +115,6 @@  FNNAME (INSN_NAME)
 
 int main (void)
 {
-  FNNAME (INSN_NAME);
+  FNNAME (INSN_NAME) ();
   return 0;
 }

[ARM,AArch64,testsuite] Fix vaddl and vaddw tests

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