diff mbox series

[v2,11/12] usb: dwc2: Add clock gating exiting flow by system resume

Message ID 20210413073723.BA0FEA022E@mailhost.synopsys.com
State Superseded
Headers show
Series [v2,01/12] usb: dwc2: Add device clock gating support functions | expand

Commit Message

Artur Petrosyan April 13, 2021, 7:37 a.m. UTC
If not hibernation nor partial power down are supported,
port resume is done using the clock gating programming flow.

Adds a new flow of exiting clock gating when PC is
resumed.

Signed-off-by: Artur Petrosyan <Arthur.Petrosyan@synopsys.com>
---
 Changes in v2:
 - None

 drivers/usb/dwc2/hcd.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Sergei Shtylyov April 13, 2021, 9:30 a.m. UTC | #1
On 13.04.2021 10:37, Artur Petrosyan wrote:

> If not hibernation nor partial power down are supported,

    s/not/neither/?

> port resume is done using the clock gating programming flow.
> 
> Adds a new flow of exiting clock gating when PC is
> resumed.
> 
> Signed-off-by: Artur Petrosyan <Arthur.Petrosyan@synopsys.com>
> ---
>   Changes in v2:
>   - None
> 
>   drivers/usb/dwc2/hcd.c | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
> 
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 09dcd37b9ef8..04a1b53d65af 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -4445,6 +4445,28 @@ static int _dwc2_hcd_resume(struct usb_hcd *hcd)
>   		break;
>   	case DWC2_POWER_DOWN_PARAM_HIBERNATION:
>   	case DWC2_POWER_DOWN_PARAM_NONE:
> +		/*
> +		 * If not hibernation nor partial power down are supported,

    s/not/neither/?

[...]

MBR, Sergei
diff mbox series

Patch

diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 09dcd37b9ef8..04a1b53d65af 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -4445,6 +4445,28 @@  static int _dwc2_hcd_resume(struct usb_hcd *hcd)
 		break;
 	case DWC2_POWER_DOWN_PARAM_HIBERNATION:
 	case DWC2_POWER_DOWN_PARAM_NONE:
+		/*
+		 * If not hibernation nor partial power down are supported,
+		 * port resume is done using the clock gating programming flow.
+		 */
+		spin_unlock_irqrestore(&hsotg->lock, flags);
+		dwc2_host_exit_clock_gating(hsotg, 0);
+
+		/*
+		 * Initialize the Core for Host mode, as after system resume
+		 * the global interrupts are disabled.
+		 */
+		dwc2_core_init(hsotg, false);
+		dwc2_enable_global_interrupts(hsotg);
+		dwc2_hcd_reinit(hsotg);
+		spin_lock_irqsave(&hsotg->lock, flags);
+
+		/*
+		 * Set HW accessible bit before powering on the controller
+		 * since an interrupt may rise.
+		 */
+		set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+		break;
 	default:
 		hsotg->lx_state = DWC2_L0;
 		goto unlock;