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[RESEND,v3,3/3] dt-bingdings: mmc: Mediatek: add ICE clock

Message ID 20210414080951.2800-4-peng.zhou@mediatek.com
State New
Headers show
Series None | expand

Commit Message

Peng Zhou April 14, 2021, 8:09 a.m. UTC 
From: Peng Zhou <Peng.Zhou@mediatek.com>


Document the binding for crypto clock of the Inline Crypto Engine (ICE)
on Mediatek SoCs.

Signed-off-by: Peng Zhou <Peng.Zhou@mediatek.com>

---
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

-- 
2.18.0
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Patch

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 01630b0ecea7..a81c14c88906 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -37,7 +37,7 @@  properties:
     description:
       Should contain phandle for the clock feeding the MMC controller.
     minItems: 2
-    maxItems: 8
+    maxItems: 9
     items:
       - description: source clock (required).
       - description: HCLK which used for host (required).
@@ -47,10 +47,11 @@  properties:
       - description: peripheral bus clock gate (required for MT8192).
       - description: AXI bus clock gate (required for MT8192).
       - description: AHB bus clock gate (required for MT8192).
+      - description: crypto clock used for data encrypt/decrypt (optional).
 
   clock-names:
     minItems: 2
-    maxItems: 8
+    maxItems: 9
     items:
       - const: source
       - const: hclk
@@ -60,6 +61,7 @@  properties:
       - const: pclk_cg
       - const: axi_cg
       - const: ahb_cg
+      - const: crypto
 
   pinctrl-names:
     items: