| Message ID | 20210415232532.4070366-1-robert.hancock@calian.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | i2c: cadence: Add standard bus recovery support | expand |
Hi, On 4/16/21 1:25 AM, Robert Hancock wrote: > Hook up the standard GPIO/pinctrl-based recovery support for this > driver. > > Based on a patch "i2c: cadence: Recover bus after controller reset" by > Chirag Parekh in the Xilinx kernel Git tree, but simplified to make use > of more common code. > > Cc: Chirag Parekh <chiragp@xilinx.com> > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > --- > drivers/i2c/busses/i2c-cadence.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c > index c1bbc4caeb5c..d017bc64e759 100644 > --- a/drivers/i2c/busses/i2c-cadence.c > +++ b/drivers/i2c/busses/i2c-cadence.c > @@ -178,6 +178,7 @@ enum cdns_i2c_slave_state { > * @clk: Pointer to struct clk > * @clk_rate_change_nb: Notifier block for clock rate changes > * @quirks: flag for broken hold bit usage in r1p10 > + * @rinfo: Structure holding recovery information. > * @ctrl_reg_diva_divb: value of fields DIV_A and DIV_B from CR register > * @slave: Registered slave instance. > * @dev_mode: I2C operating role(master/slave). > @@ -202,6 +203,7 @@ struct cdns_i2c { > struct clk *clk; > struct notifier_block clk_rate_change_nb; > u32 quirks; > + struct i2c_bus_recovery_info rinfo; > #if IS_ENABLED(CONFIG_I2C_SLAVE) > u16 ctrl_reg_diva_divb; > struct i2c_client *slave; > @@ -752,6 +754,7 @@ static int cdns_i2c_process_msg(struct cdns_i2c *id, struct i2c_msg *msg, > /* Wait for the signal of completion */ > time_left = wait_for_completion_timeout(&id->xfer_done, adap->timeout); > if (time_left == 0) { > + i2c_recover_bus(adap); > cdns_i2c_master_reset(adap); > dev_err(id->adap.dev.parent, > "timeout waiting on completion\n"); > @@ -1212,6 +1215,7 @@ static int cdns_i2c_probe(struct platform_device *pdev) > id->adap.retries = 3; /* Default retry value. */ > id->adap.algo_data = id; > id->adap.dev.parent = &pdev->dev; > + id->adap.bus_recovery_info = &id->rinfo; > init_completion(&id->xfer_done); > snprintf(id->adap.name, sizeof(id->adap.name), > "Cadence I2C at %08lx", (unsigned long)r_mem->start); > My colleague sent pinctrl driver for ZynqMP already. This driver can be used on Zynq where pinctrl driver already exists upstream. It looks quite nice. Acked-by: Michal Simek <michal.simek@xilinx.com> Thanks, Michal
On Tue, 2021-04-20 at 15:23 +0200, Michal Simek wrote: > Hi, > > On 4/16/21 1:25 AM, Robert Hancock wrote: > > Hook up the standard GPIO/pinctrl-based recovery support for this > > driver. > > > > Based on a patch "i2c: cadence: Recover bus after controller reset" by > > Chirag Parekh in the Xilinx kernel Git tree, but simplified to make use > > of more common code. > > > > Cc: Chirag Parekh <chiragp@xilinx.com> > > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > > --- > > drivers/i2c/busses/i2c-cadence.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c- > > cadence.c > > index c1bbc4caeb5c..d017bc64e759 100644 > > --- a/drivers/i2c/busses/i2c-cadence.c > > +++ b/drivers/i2c/busses/i2c-cadence.c > > @@ -178,6 +178,7 @@ enum cdns_i2c_slave_state { > > * @clk: Pointer to struct clk > > * @clk_rate_change_nb: Notifier block for clock rate changes > > * @quirks: flag for broken hold bit usage in r1p10 > > + * @rinfo: Structure holding recovery information. > > * @ctrl_reg_diva_divb: value of fields DIV_A and DIV_B from CR register > > * @slave: Registered slave instance. > > * @dev_mode: I2C operating role(master/slave). > > @@ -202,6 +203,7 @@ struct cdns_i2c { > > struct clk *clk; > > struct notifier_block clk_rate_change_nb; > > u32 quirks; > > + struct i2c_bus_recovery_info rinfo; > > #if IS_ENABLED(CONFIG_I2C_SLAVE) > > u16 ctrl_reg_diva_divb; > > struct i2c_client *slave; > > @@ -752,6 +754,7 @@ static int cdns_i2c_process_msg(struct cdns_i2c *id, > > struct i2c_msg *msg, > > /* Wait for the signal of completion */ > > time_left = wait_for_completion_timeout(&id->xfer_done, adap->timeout); > > if (time_left == 0) { > > + i2c_recover_bus(adap); > > cdns_i2c_master_reset(adap); > > dev_err(id->adap.dev.parent, > > "timeout waiting on completion\n"); > > @@ -1212,6 +1215,7 @@ static int cdns_i2c_probe(struct platform_device > > *pdev) > > id->adap.retries = 3; /* Default retry value. */ > > id->adap.algo_data = id; > > id->adap.dev.parent = &pdev->dev; > > + id->adap.bus_recovery_info = &id->rinfo; > > init_completion(&id->xfer_done); > > snprintf(id->adap.name, sizeof(id->adap.name), > > "Cadence I2C at %08lx", (unsigned long)r_mem->start); > > > > My colleague sent pinctrl driver for ZynqMP already. This driver can be > used on Zynq where pinctrl driver already exists upstream. > > It looks quite nice. > > Acked-by: Michal Simek <michal.simek@xilinx.com> > Any other feedback on this patch? I only saw the ack from Michal. The pinctrl driver which is needed to make this useful on the ZynqMP platform has now been merged into mainline (commit 8b242ca700f8043be56542efd8360056358a42ed, "pinctrl: Add Xilinx ZynqMP pinctrl driver support"). > Thanks, > Michal -- Robert Hancock Senior Hardware Designer, Calian Advanced Technologies www.calian.com
diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c index c1bbc4caeb5c..d017bc64e759 100644 --- a/drivers/i2c/busses/i2c-cadence.c +++ b/drivers/i2c/busses/i2c-cadence.c @@ -178,6 +178,7 @@ enum cdns_i2c_slave_state { * @clk: Pointer to struct clk * @clk_rate_change_nb: Notifier block for clock rate changes * @quirks: flag for broken hold bit usage in r1p10 + * @rinfo: Structure holding recovery information. * @ctrl_reg_diva_divb: value of fields DIV_A and DIV_B from CR register * @slave: Registered slave instance. * @dev_mode: I2C operating role(master/slave). @@ -202,6 +203,7 @@ struct cdns_i2c { struct clk *clk; struct notifier_block clk_rate_change_nb; u32 quirks; + struct i2c_bus_recovery_info rinfo; #if IS_ENABLED(CONFIG_I2C_SLAVE) u16 ctrl_reg_diva_divb; struct i2c_client *slave; @@ -752,6 +754,7 @@ static int cdns_i2c_process_msg(struct cdns_i2c *id, struct i2c_msg *msg, /* Wait for the signal of completion */ time_left = wait_for_completion_timeout(&id->xfer_done, adap->timeout); if (time_left == 0) { + i2c_recover_bus(adap); cdns_i2c_master_reset(adap); dev_err(id->adap.dev.parent, "timeout waiting on completion\n"); @@ -1212,6 +1215,7 @@ static int cdns_i2c_probe(struct platform_device *pdev) id->adap.retries = 3; /* Default retry value. */ id->adap.algo_data = id; id->adap.dev.parent = &pdev->dev; + id->adap.bus_recovery_info = &id->rinfo; init_completion(&id->xfer_done); snprintf(id->adap.name, sizeof(id->adap.name), "Cadence I2C at %08lx", (unsigned long)r_mem->start);
Hook up the standard GPIO/pinctrl-based recovery support for this driver. Based on a patch "i2c: cadence: Recover bus after controller reset" by Chirag Parekh in the Xilinx kernel Git tree, but simplified to make use of more common code. Cc: Chirag Parekh <chiragp@xilinx.com> Signed-off-by: Robert Hancock <robert.hancock@calian.com> --- drivers/i2c/busses/i2c-cadence.c | 4 ++++ 1 file changed, 4 insertions(+)