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[66.131.180.142]) by mx.google.com with ESMTPSA id w9sm36676419qab.18.2015.01.05.20.09.01 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 05 Jan 2015 20:09:02 -0800 (PST) Date: Mon, 5 Jan 2015 23:09:00 -0500 (EST) From: Nicolas Pitre To: Will Deacon Subject: Re: [PATCH] Revert 9fc2105aeaaf56b0cf75296a84702d0f9e64437b to fix pyaudio (and probably more) In-Reply-To: <20150105121126.GA10116@arm.com> Message-ID: References: <20150104190123.GA20153@amd> <20150104201026.GA23427@amd> <20150104203724.GA16372@amd> <20150104212659.GC12302@n2100.arm.linux.org.uk> <20150105121126.GA10116@arm.com> User-Agent: Alpine 2.11 (LFD 23 2013-08-11) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150105_200926_459347_C578363D X-CRM114-Status: GOOD ( 18.86 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.216.182 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.216.182 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Marc Zyngier , Russell King - ARM Linux , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: nicolas.pitre@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 On Mon, 5 Jan 2015, Will Deacon wrote: > On Mon, Jan 05, 2015 at 04:51:31AM +0000, Nicolas Pitre wrote: > > Because the reported bogomips is orders of magnitude away from the > > traditionally expected value for a given CPU when timer based delays are > > in use, and because lumping bogomips and timer based delay loops is rather > > senseless anyway, let's calibrate bogomips using a CPU loop all the time > > even when timer based delays are available. Timer based delays don't > > need any calibration and /proc/cpuinfo will provide somewhat sensible > > values again. > > > > In practice, calls to __delay() will now always use the CPU based loop. > > Things remain unchanged for udelay() and its derivatives. > > Given that we have a hard limit of 3355 bogomips in our calibration code, > could we not just report that instead? We already have all of the issues I > highlighted above and the systems that are going to be hit by this are the > more recent (more performant) cores that will be approaching this maximum > value anyway. I already replied to the other issues in my previous email. Now here's the bogomips hard limit gone: ----- >8 From: Nicolas Pitre Date: Mon, 5 Jan 2015 22:43:56 -0500 Subject: [PATCH] ARM: loop_udelay: remove bogomips value limitation Now that we don't support ARMv3 anymore, the loop based delay code can convert microsecs into number of loops using a 64-bit multiplication. This allows us to lift the hard limit of 3355 on the bogomips value with loops_per_jiffy that can safely span the full 32-bit range. Signed-off-by: Nicolas Pitre diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h index 7feeb163f5..287c96ad93 100644 --- a/arch/arm/include/asm/delay.h +++ b/arch/arm/include/asm/delay.h @@ -10,8 +10,8 @@ #include /* HZ */ #define MAX_UDELAY_MS 2 -#define UDELAY_MULT ((UL(2199023) * HZ) >> 11) -#define UDELAY_SHIFT 30 +#define UDELAY_MULT UL(2047 * HZ + 483648 * HZ / 1000000) +#define UDELAY_SHIFT 31 #ifndef __ASSEMBLY__ @@ -33,7 +33,7 @@ extern struct arm_delay_ops { * it, it means that you're calling udelay() with an out of range value. * * With currently imposed limits, this means that we support a max delay - * of 2000us. Further limits: HZ<=1000 and bogomips<=3355 + * of 2000us. Further limits: HZ<=1000 */ extern void __bad_udelay(void); diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S index 518bf6e93f..bcc23c5760 100644 --- a/arch/arm/lib/delay-loop.S +++ b/arch/arm/lib/delay-loop.S @@ -17,7 +17,6 @@ /* * r0 <= 2000 - * lpj <= 0x01ffffff (max. 3355 bogomips) * HZ <= 1000 */ @@ -25,16 +24,11 @@ ENTRY(__loop_udelay) ldr r2, .LC1 mul r0, r2, r0 ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06 - mov r1, #-1 ldr r2, .LC0 - ldr r2, [r2] @ max = 0x01ffffff - add r0, r0, r1, lsr #32-14 - mov r0, r0, lsr #14 @ max = 0x0001ffff - add r2, r2, r1, lsr #32-10 - mov r2, r2, lsr #10 @ max = 0x00007fff - mul r0, r2, r0 @ max = 2^32-1 - add r0, r0, r1, lsr #32-6 - movs r0, r0, lsr #6 + ldr r2, [r2] + umull r1, r0, r2, r0 + adds r1, r1, #0xffffffff + adcs r0, r0, r0 reteq lr /*