pinctrl: amd: Implement irq_set_wake

Message ID 20210429163341.1.I7631534622233689dd81410525e0dd617b9b2012@changeid
State New
Headers show
Series
  • pinctrl: amd: Implement irq_set_wake
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Commit Message

Raul Rangel April 29, 2021, 10:34 p.m.
This allows the OS to control which devices produce wake events.

$ grep enabled /sys/kernel/irq/*/wakeup
/sys/kernel/irq/24/wakeup:enabled

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
---

 drivers/pinctrl/pinctrl-amd.c | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

Comments

Andy Shevchenko April 30, 2021, 9:22 a.m. | #1
On Fri, Apr 30, 2021 at 1:34 AM Raul E Rangel <rrangel@chromium.org> wrote:
>

> This allows the OS to control which devices produce wake events.

>

> $ grep enabled /sys/kernel/irq/*/wakeup

> /sys/kernel/irq/24/wakeup:enabled


Is it a bug fix of [1]?

If so, add a BugLink: tag here.

> Signed-off-by: Raul E Rangel <rrangel@chromium.org>


[1]:

...

irq_hw_number_t hw = irqd_to_hwirq(d);

> +       pin_reg = readl(gpio_dev->base + (d->hwirq)*4);


> +       writel(pin_reg, gpio_dev->base + (d->hwirq)*4);


Too many parentheses and missed spaces


-- 
With Best Regards,
Andy Shevchenko
Andy Shevchenko April 30, 2021, 9:23 a.m. | #2
On Fri, Apr 30, 2021 at 12:22 PM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
> On Fri, Apr 30, 2021 at 1:34 AM Raul E Rangel <rrangel@chromium.org> wrote:

> >

> > This allows the OS to control which devices produce wake events.

> >

> > $ grep enabled /sys/kernel/irq/*/wakeup

> > /sys/kernel/irq/24/wakeup:enabled

>

> Is it a bug fix of [1]?

>

> If so, add a BugLink: tag here.


And Fixes if it is the case.

>

> > Signed-off-by: Raul E Rangel <rrangel@chromium.org>

>

> [1]:


[1]: https://bugzilla.kernel.org/show_bug.cgi?id=212379

-- 
With Best Regards,
Andy Shevchenko
Raul Rangel May 3, 2021, 3:53 p.m. | #3
On Fri, Apr 30, 2021 at 3:22 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>

> On Fri, Apr 30, 2021 at 1:34 AM Raul E Rangel <rrangel@chromium.org> wrote:

> >

> > This allows the OS to control which devices produce wake events.

> >

> > $ grep enabled /sys/kernel/irq/*/wakeup

> > /sys/kernel/irq/24/wakeup:enabled

>

> Is it a bug fix of [1]?

>

> If so, add a BugLink: tag here.


No bug, just implementing a missing feature. This allows the use of
the ACPI _AEI object.
>

> > Signed-off-by: Raul E Rangel <rrangel@chromium.org>

>

> [1]:

>

> ...

>

> irq_hw_number_t hw = irqd_to_hwirq(d);

>

> > +       pin_reg = readl(gpio_dev->base + (d->hwirq)*4);

>

> > +       writel(pin_reg, gpio_dev->base + (d->hwirq)*4);

>

> Too many parentheses and missed spaces


I copy/pasted the exact format used in all the other functions:
amd_gpio_irq_{enable,disable,mask,unmask}. I can send a CL to reformat
everything if you want. Or I can just change this specific function.
Let me know.

>

>

> --

> With Best Regards,

> Andy Shevchenko


Thanks for the review!
Linus Walleij May 19, 2021, 12:21 a.m. | #4
On Fri, Apr 30, 2021 at 12:34 AM Raul E Rangel <rrangel@chromium.org> wrote:
> This allows the OS to control which devices produce wake events.

>

> $ grep enabled /sys/kernel/irq/*/wakeup

> /sys/kernel/irq/24/wakeup:enabled

>

> Signed-off-by: Raul E Rangel <rrangel@chromium.org>


Patch applied under the assumption that this is just a new
feature. (Not a bug fix.)

Yours,
Linus Walleij

Patch

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 899c16c17b6d..27ad759e5958 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -399,6 +399,29 @@  static void amd_gpio_irq_unmask(struct irq_data *d)
 	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
 }
 
+static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
+{
+	u32 pin_reg;
+	unsigned long flags;
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
+	u32 wake_mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
+			BIT(WAKE_CNTRL_OFF_S4);
+
+	raw_spin_lock_irqsave(&gpio_dev->lock, flags);
+	pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
+
+	if (on)
+		pin_reg |= wake_mask;
+	else
+		pin_reg &= ~wake_mask;
+
+	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
+	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+	return 0;
+}
+
 static void amd_gpio_irq_eoi(struct irq_data *d)
 {
 	u32 reg;
@@ -513,9 +536,16 @@  static struct irq_chip amd_gpio_irqchip = {
 	.irq_disable  = amd_gpio_irq_disable,
 	.irq_mask     = amd_gpio_irq_mask,
 	.irq_unmask   = amd_gpio_irq_unmask,
+	.irq_set_wake = amd_gpio_irq_set_wake,
 	.irq_eoi      = amd_gpio_irq_eoi,
 	.irq_set_type = amd_gpio_irq_set_type,
-	.flags        = IRQCHIP_SKIP_SET_WAKE,
+	/*
+	 * We need to set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND so that a wake event
+	 * also generates an IRQ. We need the IRQ so the irq_handler can clear
+	 * the wake event. Otherwise the wake event will never clear and
+	 * prevent the system from suspending.
+	 */
+	.flags        = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND,
 };
 
 #define PIN_IRQ_PENDING	(BIT(INTERRUPT_STS_OFF) | BIT(WAKE_STS_OFF))