From patchwork Fri May 21 12:49:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 444678 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp947078jac; Fri, 21 May 2021 05:50:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJylvCmfWbgz63YSdQLO9Pw0cGJimprt9rAUcEM980vCh8pEV/N4oeO2+rxN/8ciUzZbfwR7 X-Received: by 2002:a17:903:20cc:b029:f0:cc11:51c2 with SMTP id i12-20020a17090320ccb02900f0cc1151c2mr11993300plb.32.1621601444073; Fri, 21 May 2021 05:50:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621601444; cv=none; d=google.com; s=arc-20160816; b=aKzeKQpGtl3n15xtbtwogy8Eih1aSl5QZgeTUU0t4gkUTf4bXHcn/rpOKasGy0BLtM 2COg0TQpd9+/1f1rWe7cnpRQjz0a4Xxn5FwihEm1kKGWTxaA/wUGbRv5e8FMOgHaVIjF /1aMD4PtDf5QOMWI2ria0/Yhjo0xTlC8dYrXCHxxO3qL872kYeJtQwdzzq4dXkhEv2mv +03aK4msZesO71nj154i7oNhG9vjAYU+DmDvYAJLHnVsIOahRRAnczJdPAvNJjyajFrB 4gzh2Wn6KoS1aGRM7TQ6Pz21vLwY5EWAYp4SrhtCa8MjR3OXdZMU/XgR8vMEGa05dmMj tO6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to; bh=32O59HgWLIq2eCYIg53a+xXJ+DR9iyCDxgrS0yqlILI=; b=a1GIQwZ906yWDepgh3PL4YPO7YAkqPtkwpmW5yr2a5y+/H34aS1erfEqYaKJUeuD2R 7MIs7xZoIEP2YBpbvJIstvi6F7GXgDrp6F1yOxHnrpAhza4vtBZPlhJJNDZxxbH7yOO0 ALt2wrH481wr7oOHqp7kuoeEutHdNcErPVNpadf4sTlRtoAzqv7MUnVxIVdHMs65gOga Hm2zOPo0ViwQyglpKEM+mwrzC+1iI7XRSGGxc3W8V01G52P+p10Qe8udrgLa2HwQsBRR QkovhKzUi/pCRlR2joPN8IO6GlHqX45naeBNW6DdR7spGsCiqS7+M0KtRZupbFZG5Vmz 7E+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@kernel.org header.s=k20201202 header.b=I3LsPb4r; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id c7si6694140pls.401.2021.05.21.05.50.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 May 2021 05:50:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=fail header.i=@kernel.org header.s=k20201202 header.b=I3LsPb4r; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC2406E506; Fri, 21 May 2021 12:50:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 188096F635; Fri, 21 May 2021 12:50:39 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 750C8613D9; Fri, 21 May 2021 12:50:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621601439; bh=Gb5d67i9Q4U15xb2aE7Imj0HQ2P/vErp6AIgUyNfqvg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I3LsPb4rQpeFHtPNwU8iI/BmV9ZRJNNwyEIakasGihBN8gev7lksE929hszuv3Bro kVeBnMBqjTzLgpZuuYJP7v1R313RDqd7+0aMclaJVsmPhn8Mq1J72rtQsnl12zK8Tu WZ01DkU6C5y0GbmrUbPsVJKoLcTzYFo5Ktmh5bMSAe9E68VFrwkIRyGRyi4eVt4djw WlWAJFaaKIEfPhe5GNHfF454i62OfzAE4PuW8ucha0Tm2iJ6HDf/GhDCWP+ux7vNwb WMScJXW07GnGg2n4E8H9IQWX08TJBI04r6CLPURJsCWHIaB644ziMw5ksnfC8qcD4z D9isIvcGV1IeQ== From: Vinod Koul To: Rob Clark Subject: [RFC PATCH 06/13] drm/msm/disp/dpu1: Add DSC support in RM Date: Fri, 21 May 2021 18:19:38 +0530 Message-Id: <20210521124946.3617862-10-vkoul@kernel.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210521124946.3617862-1-vkoul@kernel.org> References: <20210521124946.3617862-1-vkoul@kernel.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jonathan Marek , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Abhinav Kumar , Bjorn Andersson , Vinod Koul , dri-devel@lists.freedesktop.org, Dmitry Baryshkov , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This add the bits in RM to enable the DSC blocks Signed-off-by: Vinod Koul --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 32 +++++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 + 3 files changed, 34 insertions(+) -- 2.26.3 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index d6717d6672f7..d56c05146dfe 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -165,6 +165,7 @@ struct dpu_global_state { uint32_t ctl_to_enc_id[CTL_MAX - CTL_0]; uint32_t intf_to_enc_id[INTF_MAX - INTF_0]; uint32_t dspp_to_enc_id[DSPP_MAX - DSPP_0]; + uint32_t dsc_to_enc_id[DSC_MAX - DSC_0]; }; struct dpu_global_state diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index fd2d104f0a91..4da6d72b7996 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -11,6 +11,7 @@ #include "dpu_hw_intf.h" #include "dpu_hw_dspp.h" #include "dpu_hw_merge3d.h" +#include "dpu_hw_dsc.h" #include "dpu_encoder.h" #include "dpu_trace.h" @@ -75,6 +76,14 @@ int dpu_rm_destroy(struct dpu_rm *rm) dpu_hw_intf_destroy(hw); } } + for (i = 0; i < ARRAY_SIZE(rm->dsc_blks); i++) { + struct dpu_hw_dsc *hw; + + if (rm->intf_blks[i]) { + hw = to_dpu_hw_dsc(rm->dsc_blks[i]); + dpu_hw_dsc_destroy(hw); + } + } return 0; } @@ -221,6 +230,19 @@ int dpu_rm_init(struct dpu_rm *rm, rm->dspp_blks[dspp->id - DSPP_0] = &hw->base; } + for (i = 0; i < cat->dsc_count; i++) { + struct dpu_hw_dsc *hw; + const struct dpu_dsc_cfg *dsc = &cat->dsc[i]; + + hw = dpu_hw_dsc_init(dsc->id, mmio, cat); + if (IS_ERR_OR_NULL(hw)) { + rc = PTR_ERR(hw); + DPU_ERROR("failed dsc object creation: err %d\n", rc); + goto fail; + } + rm->dsc_blks[dsc->id - DSC_0] = &hw->base; + } + return 0; fail: @@ -476,6 +498,9 @@ static int _dpu_rm_reserve_intf( } global_state->intf_to_enc_id[idx] = enc_id; + + global_state->dsc_to_enc_id[0] = enc_id; + global_state->dsc_to_enc_id[1] = enc_id; return 0; } @@ -567,6 +592,8 @@ void dpu_rm_release(struct dpu_global_state *global_state, ARRAY_SIZE(global_state->ctl_to_enc_id), enc->base.id); _dpu_rm_clear_mapping(global_state->intf_to_enc_id, ARRAY_SIZE(global_state->intf_to_enc_id), enc->base.id); + _dpu_rm_clear_mapping(global_state->dsc_to_enc_id, + ARRAY_SIZE(global_state->dsc_to_enc_id), enc->base.id); } int dpu_rm_reserve( @@ -640,6 +667,11 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, hw_to_enc_id = global_state->dspp_to_enc_id; max_blks = ARRAY_SIZE(rm->dspp_blks); break; + case DPU_HW_BLK_DSC: + hw_blks = rm->dsc_blks; + hw_to_enc_id = global_state->dsc_to_enc_id; + max_blks = ARRAY_SIZE(rm->dsc_blks); + break; default: DPU_ERROR("blk type %d not managed by rm\n", type); return 0; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 1f12c8d5b8aa..278d2a510b80 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -30,6 +30,7 @@ struct dpu_rm { struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0]; struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; + struct dpu_hw_blk *dsc_blks[DSC_MAX - DSC_0]; uint32_t lm_max_width; };