[v5,6/8] iommu/arm-smmu-v3: Get associated RMR info and install

Message ID 20210524110222.2212-7-shameerali.kolothum.thodi@huawei.com
State New
Headers show
Series
  • ACPI/IORT: Support for IORT RMR node
Related show

Commit Message

Shameerali Kolothum Thodi May 24, 2021, 11:02 a.m.
Check if there is any RMR info associated with the devices behind
the SMMUv3 and if any, install bypass STEs for them. This is to
keep any ongoing traffic associated with these devices alive
when we enable/reset SMMUv3 during probe().

Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>

---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 36 +++++++++++++++++++++
 1 file changed, 36 insertions(+)

-- 
2.17.1

Comments

Robin Murphy June 14, 2021, 10:15 a.m. | #1
On 2021-05-24 12:02, Shameer Kolothum wrote:
> Check if there is any RMR info associated with the devices behind

> the SMMUv3 and if any, install bypass STEs for them. This is to

> keep any ongoing traffic associated with these devices alive

> when we enable/reset SMMUv3 during probe().

> 

> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>

> ---

>   drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 36 +++++++++++++++++++++

>   1 file changed, 36 insertions(+)

> 

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

> index f9195b740f48..be1563e06732 100644

> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

> @@ -3574,6 +3574,39 @@ static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start,

>   	return devm_ioremap_resource(dev, &res);

>   }

>   

> +static void arm_smmu_rmr_install_bypass_ste(struct arm_smmu_device *smmu)

> +{

> +	struct list_head rmr_list;

> +	struct iommu_resv_region *e;

> +	int ret;

> +

> +	INIT_LIST_HEAD(&rmr_list);

> +	if (iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &rmr_list))

> +		return;

> +

> +	/*

> +	 * Since, we don't have a mechanism to differentiate the RMR

> +	 * SIDs that has an ongoing live stream, install bypass STEs

> +	 * for all the reported ones.

> +	 */


I don't really follow that comment. The point of being reserved is that 
we don't know how and why the device is using them, and we have little 
need to care - we are simply required to preserve an effective unity 
mapping at all times. I don't see any value in trying to second-guess 
things beyond that, as this appears to suggest.

Robin.

> +	list_for_each_entry(e, &rmr_list, list) {

> +		__le64 *step;

> +		u32 sid = e->fw_data.rmr.sid;

> +

> +		ret = arm_smmu_init_sid_strtab(smmu, sid);

> +		if (ret) {

> +			dev_err(smmu->dev, "RMR bypass(0x%x) failed\n",

> +				sid);

> +			continue;

> +		}

> +

> +		step = arm_smmu_get_step_for_sid(smmu, sid);

> +		arm_smmu_write_strtab_ent(NULL, sid, step, true);

> +	}

> +

> +	iommu_dma_put_rmrs(dev_fwnode(smmu->dev), &rmr_list);

> +}

> +

>   static int arm_smmu_device_probe(struct platform_device *pdev)

>   {

>   	int irq, ret;

> @@ -3657,6 +3690,9 @@ static int arm_smmu_device_probe(struct platform_device *pdev)

>   	/* Record our private device structure */

>   	platform_set_drvdata(pdev, smmu);

>   

> +	/* Check for RMRs and install bypass STEs if any */

> +	arm_smmu_rmr_install_bypass_ste(smmu);

> +

>   	/* Reset the device */

>   	ret = arm_smmu_device_reset(smmu, bypass);

>   	if (ret)

>

Patch

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index f9195b740f48..be1563e06732 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -3574,6 +3574,39 @@  static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start,
 	return devm_ioremap_resource(dev, &res);
 }
 
+static void arm_smmu_rmr_install_bypass_ste(struct arm_smmu_device *smmu)
+{
+	struct list_head rmr_list;
+	struct iommu_resv_region *e;
+	int ret;
+
+	INIT_LIST_HEAD(&rmr_list);
+	if (iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &rmr_list))
+		return;
+
+	/*
+	 * Since, we don't have a mechanism to differentiate the RMR
+	 * SIDs that has an ongoing live stream, install bypass STEs
+	 * for all the reported ones. 
+	 */
+	list_for_each_entry(e, &rmr_list, list) {
+		__le64 *step;
+		u32 sid = e->fw_data.rmr.sid;
+
+		ret = arm_smmu_init_sid_strtab(smmu, sid);
+		if (ret) {
+			dev_err(smmu->dev, "RMR bypass(0x%x) failed\n",
+				sid);
+			continue;
+		}
+
+		step = arm_smmu_get_step_for_sid(smmu, sid);
+		arm_smmu_write_strtab_ent(NULL, sid, step, true);
+	}
+
+	iommu_dma_put_rmrs(dev_fwnode(smmu->dev), &rmr_list);
+}
+
 static int arm_smmu_device_probe(struct platform_device *pdev)
 {
 	int irq, ret;
@@ -3657,6 +3690,9 @@  static int arm_smmu_device_probe(struct platform_device *pdev)
 	/* Record our private device structure */
 	platform_set_drvdata(pdev, smmu);
 
+	/* Check for RMRs and install bypass STEs if any */
+	arm_smmu_rmr_install_bypass_ste(smmu);
+
 	/* Reset the device */
 	ret = arm_smmu_device_reset(smmu, bypass);
 	if (ret)