From patchwork Thu May 27 16:02:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alice Chao X-Patchwork-Id: 449235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 940F0C4707F for ; Thu, 27 May 2021 16:02:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73ADC6100A for ; Thu, 27 May 2021 16:02:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235157AbhE0QDw (ORCPT ); Thu, 27 May 2021 12:03:52 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:39574 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234701AbhE0QDw (ORCPT ); Thu, 27 May 2021 12:03:52 -0400 X-UUID: eb0585ad5fee486cb1e075ae3a277c78-20210528 X-UUID: eb0585ad5fee486cb1e075ae3a277c78-20210528 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1900248115; Fri, 28 May 2021 00:02:15 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 28 May 2021 00:02:13 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 28 May 2021 00:02:13 +0800 From: Alice To: , , , , , CC: , , , , , , , , Subject: [PATCH 1/1] scsi: ufs-mediatek: Fix HWReset timing Date: Fri, 28 May 2021 00:02:08 +0800 Message-ID: <20210527160209.17231-1-alice.chao@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org From: "Alice.Chao" HCI disable before HW Reset. Because of the property of mtk ufshci, we need to change reset flow to avoid potential issues. Signed-off-by: Alice.Chao --- drivers/scsi/ufs/ufs-mediatek.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index a981f261b304..c62603ed3d33 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -846,6 +846,9 @@ static int ufs_mtk_device_reset(struct ufs_hba *hba) { struct arm_smccc_res res; + /* disable hba before device reset */ + ufshcd_hba_stop(hba); + ufs_mtk_device_reset_ctrl(0, res); /*