diff mbox series

[net-next,3/4] net: phy: realteck: add dt property to disable ALDPS mode

Message ID 20210601090408.22025-4-qiangqing.zhang@nxp.com
State New
Headers show
Series net: phy: add dt property for realtek phy | expand

Commit Message

Joakim Zhang June 1, 2021, 9:04 a.m. UTC 
If enable Advance Link Down Power Saving (ALDPS) mode, it will change
crystal/clock behavior, which cause RXC clock stop for dozens to hundreds
of miliseconds. This is comfirmed by Realtek engineer.

For some MACs, it needs RXC clock to support RX logic, after this patch,
PHY can generate continuous RXC clock during auto-negotiation. This patch
adds dt property to disable ALDPS mode per users' requirement.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/net/phy/realtek.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 4219c23ff2b0..90e3a8cbfc2f 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -73,6 +73,7 @@ 
 
 /* quirks for realtek phy */
 #define RTL821X_CLKOUT_DISABLE_FEATURE		BIT(0)
+#define RTL821X_ALDPS_DISABLE_FEATURE		BIT(1)
 
 MODULE_DESCRIPTION("Realtek PHY driver");
 MODULE_AUTHOR("Johnson Leung");
@@ -104,6 +105,9 @@  static int rtl821x_probe(struct phy_device *phydev)
 	if (of_property_read_bool(dev->of_node, "rtl821x,clkout-disable"))
 		priv->quirks |= RTL821X_CLKOUT_DISABLE_FEATURE;
 
+	if (of_property_read_bool(dev->of_node, "rtl821x,aldps-disable"))
+		priv->quirks |= RTL821X_ALDPS_DISABLE_FEATURE;
+
 	phydev->priv = priv;
 
 	return 0;
@@ -325,8 +329,10 @@  static int rtl8211f_config_init(struct phy_device *phydev)
 	u16 val;
 	int ret;
 
-	val = RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_XTAL_OFF;
-	phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1, val, val);
+	if (!(priv->quirks & RTL821X_ALDPS_DISABLE_FEATURE)) {
+		val = RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_XTAL_OFF;
+		phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1, val, val);
+	}
 
 	switch (phydev->interface) {
 	case PHY_INTERFACE_MODE_RGMII: