From patchwork Fri Jun 4 10:29:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dawei Chien X-Patchwork-Id: 454436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6639CC47083 for ; Fri, 4 Jun 2021 10:30:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4976461420 for ; Fri, 4 Jun 2021 10:30:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229809AbhFDKcD (ORCPT ); Fri, 4 Jun 2021 06:32:03 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:36814 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229625AbhFDKcD (ORCPT ); Fri, 4 Jun 2021 06:32:03 -0400 X-UUID: fd700503bfee41ca9a586d8cf5da97ee-20210604 X-UUID: fd700503bfee41ca9a586d8cf5da97ee-20210604 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1445757416; Fri, 04 Jun 2021 18:30:14 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Jun 2021 18:30:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Jun 2021 18:30:12 +0800 From: Dawei Chien To: Georgi Djakov , Rob Herring , Matthias Brugger , Stephen Boyd , Ryan Case CC: Mark Rutland , Nicolas Boichat , , , , , , Fan Chen , Arvin Wang , "James Liao" , Henry Chen , Dawei Chien Subject: [PATCH V10 06/12] arm64: dts: mt8192: add dvfsrc related nodes Date: Fri, 4 Jun 2021 18:29:53 +0800 Message-ID: <20210604102959.13807-7-dawei.chien@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210604102959.13807-1-dawei.chien@mediatek.com> References: <20210604102959.13807-1-dawei.chien@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Henry Chen Enable dvfsrc on mt8192 platform. Signed-off-by: Henry Chen Signed-off-by: Dawei Chien --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 9757138a8bbd..c70a3bf744fa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -282,6 +282,12 @@ #interrupt-cells = <2>; }; + ddr_emi: dvfsrc@10012000 { + compatible = "mediatek,mt8192-dvfsrc", + "mediatek,mt6873-dvfsrc"; + reg = <0 0x10012000 0 0x1000>; + }; + systimer: timer@10017000 { compatible = "mediatek,mt8192-timer", "mediatek,mt6765-timer";