diff mbox series

[v2,01/13] dt-bindings: soc: qcom: aoss: Drop power-domain bindings

Message ID 1623080372-13521-2-git-send-email-sibis@codeaurora.org
State New
Headers show
Series [v2,01/13] dt-bindings: soc: qcom: aoss: Drop power-domain bindings | expand

Commit Message

Sibi Sankar June 7, 2021, 3:39 p.m. UTC 
The power-domains exposed by AOSS QMP node are used to notify the Always
on Subsystem (AOSS) that a particular co-processor is up/down. These
co-processors enter low-power modes independent to that of the application
processor and their states are expected to remain unaltered across system
suspend/resume cycles. To achieve this behavior let's drop the power-domain
bindings and replace them with generic qmp_send interface instead.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---

v2:
 * Commit message update [Rob]

 .../devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt       | 16 ++--------------
 1 file changed, 2 insertions(+), 14 deletions(-)

Comments

Rob Herring June 18, 2021, 8:19 p.m. UTC | #1 
On Mon, 07 Jun 2021 21:09:20 +0530, Sibi Sankar wrote:
> The power-domains exposed by AOSS QMP node are used to notify the Always

> on Subsystem (AOSS) that a particular co-processor is up/down. These

> co-processors enter low-power modes independent to that of the application

> processor and their states are expected to remain unaltered across system

> suspend/resume cycles. To achieve this behavior let's drop the power-domain

> bindings and replace them with generic qmp_send interface instead.

> 

> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

> Reviewed-by: Stephen Boyd <swboyd@chromium.org>

> ---

> 

> v2:

>  * Commit message update [Rob]

> 

>  .../devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt       | 16 ++--------------

>  1 file changed, 2 insertions(+), 14 deletions(-)

> 


Acked-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
index 783dc81b0f26..c0ae051a5b76 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
@@ -9,8 +9,7 @@  Messaging Protocol (QMP)
 
 The AOSS side channel exposes control over a set of resources, used to control
 a set of debug related clocks and to affect the low power state of resources
-related to the secondary subsystems. These resources are exposed as a set of
-power-domains.
+related to the secondary subsystems.
 
 - compatible:
 	Usage: required
@@ -46,14 +45,6 @@  power-domains.
 	Definition: must be 0
 		    The single clock represents the QDSS clock.
 
-- #power-domain-cells:
-	Usage: optional
-	Value type: <u32>
-	Definition: must be 1
-		    The provided power-domains are:
-		    CDSP state (0), LPASS state (1), modem state (2), SLPI
-		    state (3), SPSS state (4) and Venus state (5).
-
 = SUBNODES
 The AOSS side channel also provides the controls for three cooling devices,
 these are expressed as subnodes of the QMP node. The name of the node is used
@@ -66,8 +57,7 @@  to identify the resource and must therefor be "cx", "mx" or "ebi".
 
 = EXAMPLE
 
-The following example represents the AOSS side-channel message RAM and the
-mechanism exposing the power-domains, as found in SDM845.
+The following example represents the AOSS side-channel message RAM as found in SDM845.
 
   aoss_qmp: qmp@c300000 {
 	  compatible = "qcom,sdm845-aoss-qmp";
@@ -75,8 +65,6 @@  mechanism exposing the power-domains, as found in SDM845.
 	  interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
 	  mboxes = <&apss_shared 0>;
 
-	  #power-domain-cells = <1>;
-
 	  cx_cdev: cx {
 		#cooling-cells = <2>;
 	  };