[v5,01/10] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml.

Message ID 20210608102547.4880-2-steven_lee@aspeedtech.com
State Superseded
Headers show
Series
  • ASPEED sgpio driver enhancement.
Related show

Commit Message

Steven Lee June 8, 2021, 10:25 a.m.
sgpio-aspeed bindings should be converted to yaml format.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
---
 .../bindings/gpio/aspeed,sgpio.yaml           | 75 +++++++++++++++++++
 .../devicetree/bindings/gpio/sgpio-aspeed.txt | 46 ------------
 2 files changed, 75 insertions(+), 46 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
 delete mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt

Comments

Andrew Jeffery June 9, 2021, 12:42 a.m. | #1
On Tue, 8 Jun 2021, at 19:55, Steven Lee wrote:
> sgpio-aspeed bindings should be converted to yaml format.

> 

> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>

> ---

>  .../bindings/gpio/aspeed,sgpio.yaml           | 75 +++++++++++++++++++

>  .../devicetree/bindings/gpio/sgpio-aspeed.txt | 46 ------------

>  2 files changed, 75 insertions(+), 46 deletions(-)

>  create mode 100644 Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml

>  delete mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt

> 

> diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml 

> b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml

> new file mode 100644

> index 000000000000..b2ae211411ff

> --- /dev/null

> +++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml

> @@ -0,0 +1,75 @@

> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2

> +---

> +$id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#

> +$schema: http://devicetree.org/meta-schemas/core.yaml#

> +

> +title: Aspeed SGPIO controller

> +

> +maintainers:

> +  - Andrew Jeffery <andrew@aj.id.au>

> +

> +description:

> +  This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 

> 80 full

> +  featured Serial GPIOs. Each of the Serial GPIO pins can be 

> programmed to

> +  support the following options

> +  - Support interrupt option for each input port and various interrupt

> +    sensitivity option (level-high, level-low, edge-high, edge-low)

> +  - Support reset tolerance option for each output port

> +  - Directly connected to APB bus and its shift clock is from APB bus 

> clock

> +    divided by a programmable value.

> +  - Co-work with external signal-chained TTL components 

> (74LV165/74LV595)

> +

> +properties:

> +  compatible:

> +    enum:

> +      - aspeed,ast2400-sgpio

> +      - aspeed,ast2500-sgpio

> +

> +  reg:

> +    maxItems: 1

> +

> +  gpio-controller: true

> +

> +  '#gpio-cells':

> +    const: 2

> +

> +  interrupts:

> +    maxItems: 1

> +

> +  interrupt-controller: true

> +

> +  clocks:

> +    maxItems: 1

> +

> +  ngpios: true

> +

> +  bus-frequency: true


I'm not familiar enough with dt-schema to know that this does what we need, so deferring to Rob.

Looks good otherwise.

Andrew

Patch

diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
new file mode 100644
index 000000000000..b2ae211411ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
@@ -0,0 +1,75 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Aspeed SGPIO controller
+
+maintainers:
+  - Andrew Jeffery <andrew@aj.id.au>
+
+description:
+  This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
+  featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
+  support the following options
+  - Support interrupt option for each input port and various interrupt
+    sensitivity option (level-high, level-low, edge-high, edge-low)
+  - Support reset tolerance option for each output port
+  - Directly connected to APB bus and its shift clock is from APB bus clock
+    divided by a programmable value.
+  - Co-work with external signal-chained TTL components (74LV165/74LV595)
+
+properties:
+  compatible:
+    enum:
+      - aspeed,ast2400-sgpio
+      - aspeed,ast2500-sgpio
+
+  reg:
+    maxItems: 1
+
+  gpio-controller: true
+
+  '#gpio-cells':
+    const: 2
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  clocks:
+    maxItems: 1
+
+  ngpios: true
+
+  bus-frequency: true
+
+required:
+  - compatible
+  - reg
+  - gpio-controller
+  - '#gpio-cells'
+  - interrupts
+  - interrupt-controller
+  - ngpios
+  - clocks
+  - bus-frequency
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/aspeed-clock.h>
+    sgpio: sgpio@1e780200 {
+        #gpio-cells = <2>;
+        compatible = "aspeed,ast2500-sgpio";
+        gpio-controller;
+        interrupts = <40>;
+        reg = <0x1e780200 0x0100>;
+        clocks = <&syscon ASPEED_CLK_APB>;
+        interrupt-controller;
+        ngpios = <80>;
+        bus-frequency = <12000000>;
+    };
diff --git a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
deleted file mode 100644
index be329ea4794f..000000000000
--- a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
+++ /dev/null
@@ -1,46 +0,0 @@ 
-Aspeed SGPIO controller Device Tree Bindings
---------------------------------------------
-
-This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
-featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
-support the following options:
-- Support interrupt option for each input port and various interrupt
-  sensitivity option (level-high, level-low, edge-high, edge-low)
-- Support reset tolerance option for each output port
-- Directly connected to APB bus and its shift clock is from APB bus clock
-  divided by a programmable value.
-- Co-work with external signal-chained TTL components (74LV165/74LV595)
-
-Required properties:
-
-- compatible : Should be one of
-  "aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio"
-- #gpio-cells : Should be 2, see gpio.txt
-- reg : Address and length of the register set for the device
-- gpio-controller : Marks the device node as a GPIO controller
-- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
-- interrupt-controller : Mark the GPIO controller as an interrupt-controller
-- ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose
-  2 software GPIOs per hardware GPIO: one for hardware input, one for hardware
-  output. Up to 80 pins, must be a multiple of 8.
-- clocks : A phandle to the APB clock for SGPM clock division
-- bus-frequency : SGPM CLK frequency
-
-The sgpio and interrupt properties are further described in their respective
-bindings documentation:
-
-- Documentation/devicetree/bindings/gpio/gpio.txt
-- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
-
-  Example:
-	sgpio: sgpio@1e780200 {
-		#gpio-cells = <2>;
-		compatible = "aspeed,ast2500-sgpio";
-		gpio-controller;
-		interrupts = <40>;
-		reg = <0x1e780200 0x0100>;
-		clocks = <&syscon ASPEED_CLK_APB>;
-		interrupt-controller;
-		ngpios = <8>;
-		bus-frequency = <12000000>;
-	};