| Message ID | 20210615080553.2021061-2-piyush.mehta@xilinx.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] dt-bindings: gpio: Add binding documentation for modepin | expand |
On Tue, Jun 15, 2021 at 01:35:52PM +0530, Piyush Mehta wrote: > Add DT binding document for modepin GPIO controller. Please give some indication in the subject this is for Xilinx. > > Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> > State: pending > --- > .../bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml | 41 ++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml > new file mode 100644 > index 0000000..39d78f8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml > @@ -0,0 +1,41 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: ZynqMP Mode Pin GPIO controller > + > +description: > + PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin > + GPIO controller with configurable from numbers of pins (from 0 to 3 per > + PS_MODE). Every pin can be configured as input/output. And connected to other functions like GPIOs? > + > +maintainers: > + - Piyush Mehta <piyush.mehta@xilinx.com> > + > +properties: > + compatible: > + const: xlnx,zynqmp-gpio-modepin > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + > +required: > + - compatible > + - gpio-controller > + - "#gpio-cells" > + > +additionalProperties: false > + > +examples: > + - | > + modepin_gpio: gpio { Drop unused labels. > + compatible = "xlnx,zynqmp-gpio-modepin"; > + gpio-controller; > + #gpio-cells = <2>; How does one access this h/w? > + }; > + > +... > -- > 2.7.4 > >
diff --git a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml new file mode 100644 index 0000000..39d78f8 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ZynqMP Mode Pin GPIO controller + +description: + PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin + GPIO controller with configurable from numbers of pins (from 0 to 3 per + PS_MODE). Every pin can be configured as input/output. + +maintainers: + - Piyush Mehta <piyush.mehta@xilinx.com> + +properties: + compatible: + const: xlnx,zynqmp-gpio-modepin + + gpio-controller: true + + "#gpio-cells": + const: 2 + +required: + - compatible + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + modepin_gpio: gpio { + compatible = "xlnx,zynqmp-gpio-modepin"; + gpio-controller; + #gpio-cells = <2>; + }; + +...
Add DT binding document for modepin GPIO controller. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> State: pending --- .../bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml