[Xen-devel,v4,30/33] tools/libxl: arm: Use an higher value for the GIC phandle

Message ID 1426793399-6283-31-git-send-email-julien.grall@linaro.org
State New
Headers show

Commit Message

Julien Grall March 19, 2015, 7:29 p.m.
The partial device tree may contains phandle. The Device Tree Compiler
tends to allocate the phandle from 1.

Reserve the ID 65000 for the GIC phandle. I think we can safely assume
that the partial device tree will never contain a such ID.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>

    It's not easily possible to track the maximum phandle in the partial
    device tree.

    We would need to parse it twice: one for looking the maximum
    phandle, and one for copying the nodes. This is because we have to
    know the phandle of the GIC when we create the properties of the

    As the phandle is encoded an unsigned 32 bits, I could use an higher
    value. Though, having 65000 phandle is already a lot...

    TODO: If it's necessary, I can check if the value has been used by
    another phandle in the device tree.

    Changes in v3:
        - Patch added
 tools/libxl/libxl_arm.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)


diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c
index 54d197b..0723a47 100644
--- a/tools/libxl/libxl_arm.c
+++ b/tools/libxl/libxl_arm.c
@@ -80,10 +80,11 @@  static struct arch_info {
     {"xen-3.0-aarch64", "arm,armv8-timer", "arm,armv8" },
-enum {
-    PHANDLE_NONE = 0,
+ * The device tree compiler (DTC) is allocating the phandle from 1 to
+ * onwards. Reserve a high value for the GIC phandle.
+ */
+#define PHANDLE_GIC (65000)
 typedef uint32_t be32;
 typedef be32 gic_interrupt[3];