diff mbox series

[v3,2/4] arm64: dts: qcom: sm8250: Add SDHCI2 sleep mode pinctrl

Message ID 20210616002321.74155-2-konrad.dybcio@somainline.org
State Accepted
Commit 8eaa6501ef2671daba3a595852ec453fe5a7d34c
Headers show
Series None | expand

Commit Message

Konrad Dybcio June 16, 2021, 12:23 a.m. UTC
Add required pins for SDHCI2, so that the interface can work reliably.
This commit adds sleep_state setup to the SoC DTSI, as it is common for
all boards.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
Changes since v2:
- Only add sleep_state to the SoC DTSI

 arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index fc1049c2bb11..0b99f1d03c4a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3401,6 +3401,26 @@  ws {
 					output-high;
 				};
 			};
+
+			sdc2_sleep_state: sdc2-sleep {
+				clk {
+					pins = "sdc2_clk";
+					drive-strength = <2>;
+					bias-disable;
+				};
+
+				cmd {
+					pins = "sdc2_cmd";
+					drive-strength = <2>;
+					bias-pull-up;
+				};
+
+				data {
+					pins = "sdc2_data";
+					drive-strength = <2>;
+					bias-pull-up;
+				};
+			};
 		};
 
 		apps_smmu: iommu@15000000 {