| Message ID | 20210619172626.875885-11-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | accel/tcg: Fix for #360 and other i/o alignment issues | expand |
On 6/19/21 7:26 PM, Richard Henderson wrote: > There is nothing about the blackhole that requires 4 byte > operations. Decrease the min size to 1, increase the max > size to 8. Drop duplicate endianness spec. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > hw/pci-host/q35.c | 9 ++++----- > 1 file changed, 4 insertions(+), 5 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 2eb729dff5..133be67e4f 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -268,7 +268,7 @@ static const TypeInfo q35_host_info = { static uint64_t blackhole_read(void *ptr, hwaddr reg, unsigned size) { - return 0xffffffff; + return UINT64_MAX; } static void blackhole_write(void *opaque, hwaddr addr, uint64_t val, @@ -282,10 +282,9 @@ static const MemoryRegionOps blackhole_ops = { .write = blackhole_write, .endianness = DEVICE_NATIVE_ENDIAN, .valid.min_access_size = 1, - .valid.max_access_size = 4, - .impl.min_access_size = 4, - .impl.max_access_size = 4, - .endianness = DEVICE_LITTLE_ENDIAN, + .valid.max_access_size = 8, + .impl.min_access_size = 1, + .impl.max_access_size = 8, }; /* PCIe MMCFG */
There is nothing about the blackhole that requires 4 byte operations. Decrease the min size to 1, increase the max size to 8. Drop duplicate endianness spec. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- hw/pci-host/q35.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) -- 2.25.1