diff mbox series

[v4,4/5] MIPS: CI20: Reduce clocksource to 750 kHz.

Message ID 1624688321-69131-5-git-send-email-zhouyanjie@wanyeetech.com
State Accepted
Commit 23c64447b3538a6f34cb38aae3bc19dc1ec53436
Headers show
Series Misc Ingenic patches. | expand

Commit Message

Zhou Yanjie June 26, 2021, 6:18 a.m. UTC
The original clock (3 MHz) is too fast for the clocksource,
there will be a chance that the system may get stuck.

Reported-by: Nikolaus Schaller <hns@goldelico.com>
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---

Notes:
    v4:
    New patch.

 arch/mips/boot/dts/ingenic/ci20.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Paul Cercueil June 30, 2021, 12:21 p.m. UTC | #1
Hi Zhou,

Le sam., juin 26 2021 at 14:18:40 +0800, 周琰杰 (Zhou Yanjie) 
<zhouyanjie@wanyeetech.com> a écrit :
> The original clock (3 MHz) is too fast for the clocksource,

> there will be a chance that the system may get stuck.

> 

> Reported-by: Nikolaus Schaller <hns@goldelico.com>

> Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20

> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>


Acked-by: Paul Cercueil <paul@crapouillou.net>


Cheers,
-Paul

> ---

> 

> Notes:

>     v4:

>     New patch.

> 

>  arch/mips/boot/dts/ingenic/ci20.dts | 4 ++--

>  1 file changed, 2 insertions(+), 2 deletions(-)

> 

> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts 

> b/arch/mips/boot/dts/ingenic/ci20.dts

> index 8877c62..3a4eaf1 100644

> --- a/arch/mips/boot/dts/ingenic/ci20.dts

> +++ b/arch/mips/boot/dts/ingenic/ci20.dts

> @@ -525,10 +525,10 @@

> 

>  &tcu {

>  	/*

> -	 * 750 kHz for the system timer and 3 MHz for the clocksource,

> +	 * 750 kHz for the system timer and clocksource,

>  	 * use channel #0 for the system timer, #1 for the clocksource.

>  	 */

>  	assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,

>  					  <&tcu TCU_CLK_OST>;

> -	assigned-clock-rates = <750000>, <3000000>, <3000000>;

> +	assigned-clock-rates = <750000>, <750000>, <3000000>;

>  };

> --

> 2.7.4

>
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 8877c62..3a4eaf1 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -525,10 +525,10 @@ 
 
 &tcu {
 	/*
-	 * 750 kHz for the system timer and 3 MHz for the clocksource,
+	 * 750 kHz for the system timer and clocksource,
 	 * use channel #0 for the system timer, #1 for the clocksource.
 	 */
 	assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
 					  <&tcu TCU_CLK_OST>;
-	assigned-clock-rates = <750000>, <3000000>, <3000000>;
+	assigned-clock-rates = <750000>, <750000>, <3000000>;
 };