diff mbox series

[v1] ARM: dts: rockchip: rename timer compatible strings for rk3066a.dtsi

Message ID 20210709101624.1463-1-jbx6244@gmail.com
State Accepted
Commit b3198e046821d395d148cfd5c623de4f280628d0
Headers show
Series [v1] ARM: dts: rockchip: rename timer compatible strings for rk3066a.dtsi | expand

Commit Message

Johan Jonker July 9, 2021, 10:16 a.m. UTC
The compatible string "snps,dw-apb-timer-osc" was deprecated in place
of "snps,dw-apb-timer". Rename the timer compatible strings in
rk3066a.dtsi, so boot loaders like U-boot can use the timer node
directly without conversion.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Heiko Stuebner July 11, 2021, 11:26 p.m. UTC | #1
On Fri, 9 Jul 2021 12:16:24 +0200, Johan Jonker wrote:
> The compatible string "snps,dw-apb-timer-osc" was deprecated in place

> of "snps,dw-apb-timer". Rename the timer compatible strings in

> rk3066a.dtsi, so boot loaders like U-boot can use the timer node

> directly without conversion.


Applied, thanks!

[1/1] ARM: dts: rockchip: rename timer compatible strings for rk3066a.dtsi
      commit: b3198e046821d395d148cfd5c623de4f280628d0

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 9257ef6f8..b52ef9254 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -235,7 +235,7 @@ 
 	};
 
 	timer2: timer@2000e000 {
-		compatible = "snps,dw-apb-timer-osc";
+		compatible = "snps,dw-apb-timer";
 		reg = <0x2000e000 0x100>;
 		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>;
@@ -256,7 +256,7 @@ 
 	};
 
 	timer0: timer@20038000 {
-		compatible = "snps,dw-apb-timer-osc";
+		compatible = "snps,dw-apb-timer";
 		reg = <0x20038000 0x100>;
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>;
@@ -264,7 +264,7 @@ 
 	};
 
 	timer1: timer@2003a000 {
-		compatible = "snps,dw-apb-timer-osc";
+		compatible = "snps,dw-apb-timer";
 		reg = <0x2003a000 0x100>;
 		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>;