From patchwork Fri Oct 21 16:56:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 4784 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 9B09723DEF for ; Fri, 21 Oct 2011 16:56:18 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 8954FA182EB for ; Fri, 21 Oct 2011 16:56:18 +0000 (UTC) Received: by bkbzs2 with SMTP id zs2so7062423bkb.11 for ; Fri, 21 Oct 2011 09:56:18 -0700 (PDT) Received: by 10.223.77.69 with SMTP id f5mr26004390fak.3.1319216178186; Fri, 21 Oct 2011 09:56:18 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.1.71 with SMTP id 7cs22887lak; Fri, 21 Oct 2011 09:56:18 -0700 (PDT) Received: by 10.216.70.1 with SMTP id o1mr409336wed.66.1319216177566; Fri, 21 Oct 2011 09:56:17 -0700 (PDT) Received: from mail-wy0-f178.google.com (mail-wy0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id z32si10148972weq.133.2011.10.21.09.56.17 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 21 Oct 2011 09:56:17 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by mail-wy0-f178.google.com with SMTP id 28so4817080wyf.37 for ; Fri, 21 Oct 2011 09:56:17 -0700 (PDT) Received: by 10.227.32.78 with SMTP id b14mr6006581wbd.5.1319216176927; Fri, 21 Oct 2011 09:56:16 -0700 (PDT) Received: from localhost.localdomain (pas72-1-88-161-60-229.fbx.proxad.net. [88.161.60.229]) by mx.google.com with ESMTPS id fo7sm22805839wbb.20.2011.10.21.09.56.15 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 21 Oct 2011 09:56:16 -0700 (PDT) From: Vincent Guittot To: linaro-dev@lists.linaro.org Cc: patches@linaro.org, Vincent Guittot Subject: [RFC PATCH 06/11] ARM: cpu topology: Modify cpu_power according to sched_mc level Date: Fri, 21 Oct 2011 18:56:02 +0200 Message-Id: <1319216162-2604-1-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.4.1 Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 48 +++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 47 insertions(+), 1 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 974177d..1196f2d 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -62,6 +62,41 @@ static void (*set_cpu_topology_mask)(void) = default_cpu_topology_mask; */ static DEFINE_PER_CPU(unsigned int, cpu_scale); + +struct cputopo_scale { + int scale; +}; + +static struct cputopo_scale cpu_power[NR_CPUS]; + +#define CPU_TOPO_MAX_SCALING 2 + +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 1 + +/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. + * The content of this table could be SoC specific so we should add a method to + * overwrite this default table. + * TODO: Study how to use DT for setting this table + */ +static unsigned long table_cpu_power[CPU_TOPO_MAX_SCALING] = { + {1024}, /* default */ + {4096}, /* Power save mode CA9 MP */ +}; + +static void set_power_scale(unsigned int cpuid, unsigned int idx) +{ + cpu_power[cpuid].scale = idx; + per_cpu(cpu_scale, cpuid) = table_cpu_power[cpu_power[cpuid].scale]; + smp_wmb(); +} + +static int topo_cpuscale_init(void) +{ + /* Nothing to do right now */ + return 0; +} + /* * Update the cpu power */ @@ -123,6 +158,8 @@ static void default_cpu_topology_mask(void) } } } + + set_power_scale(cpuid, ARM_CORTEX_A9_DEFAULT_SCALE); } smp_wmb(); } @@ -133,8 +170,12 @@ static void default_cpu_topology_mask(void) */ static void power_cpu_topology_mask_CA9(void) { + unsigned int cpuid, cpu, idx; - unsigned int cpuid, cpu; + if (num_possible_cpus() > 2) + idx = ARM_CORTEX_A9_DEFAULT_SCALE; + else + idx = ARM_CORTEX_A9_POWER_SCALE; for_each_possible_cpu(cpuid) { struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; @@ -158,6 +199,8 @@ static void power_cpu_topology_mask_CA9(void) } } } + + set_power_scale(cpuid, idx); } smp_wmb(); } @@ -194,6 +237,7 @@ static int update_cpu_topology_policy(void) return 0; } + /* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, @@ -293,6 +337,8 @@ void init_cpu_topology(void) cpumask_clear(&cpu_topo->thread_sibling); per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; + + cpu_power[cpu].scale = ARM_CORTEX_A9_DEFAULT_SCALE; } smp_wmb(); }