| Message ID | 20210716182328.218768-1-marex@denx.de |
|---|---|
| State | New |
| Headers | show |
| Series | net: phy: Add RGMII_ID/TXID/RXID handling to the DP83822 driver | expand |
Hi Marek,
I love your patch! Yet something to improve:
[auto build test ERROR on net/master]
[also build test ERROR on ipvs/master linus/master v5.14-rc1 next-20210716]
[cannot apply to net-next/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Marek-Vasut/net-phy-Add-RGMII_ID-TXID-RXID-handling-to-the-DP83822-driver/20210718-111900
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git 20192d9c9f6ae447c461285c915502ffbddf5696
config: arm-randconfig-r034-20210718 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 5d5b08761f944d5b9822d582378333cc4b36a0a7)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/531a8b9dc73d7244ee6452e4b951f4637da20ded
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Marek-Vasut/net-phy-Add-RGMII_ID-TXID-RXID-handling-to-the-DP83822-driver/20210718-111900
git checkout 531a8b9dc73d7244ee6452e4b951f4637da20ded
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=arm SHELL=/bin/bash drivers/net/phy/ fs/ceph/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/net/phy/dp83822.c:335:2: error: use of undeclared identifier 'ret'
ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
^
drivers/net/phy/dp83822.c:337:6: error: use of undeclared identifier 'ret'
if (ret < 0)
^
drivers/net/phy/dp83822.c:338:10: error: use of undeclared identifier 'ret'
return ret;
^
drivers/net/phy/dp83822.c:342:3: error: use of undeclared identifier 'ret'
ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
^
drivers/net/phy/dp83822.c:346:3: error: use of undeclared identifier 'ret'
ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
^
drivers/net/phy/dp83822.c:349:6: error: use of undeclared identifier 'ret'
if (ret < 0)
^
drivers/net/phy/dp83822.c:350:10: error: use of undeclared identifier 'ret'
return ret;
^
drivers/net/phy/dp83822.c:354:3: error: use of undeclared identifier 'ret'
ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
^
drivers/net/phy/dp83822.c:358:3: error: use of undeclared identifier 'ret'
ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
^
drivers/net/phy/dp83822.c:362:9: error: use of undeclared identifier 'ret'
return ret;
^
10 errors generated.
vim +/ret +335 drivers/net/phy/dp83822.c
330
331 static int dp8382x_disable_wol(struct phy_device *phydev)
332 {
333 u16 val = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON;
334
> 335 ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
336 MII_DP83822_WOL_CFG, val);
337 if (ret < 0)
338 return ret;
339
340 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
341 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
342 ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
343 DP83822_RGMII_RX_CLOCK_SHIFT,
344 DP83822_RGMII_RX_CLOCK_SHIFT);
345 } else {
346 ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
347 DP83822_RGMII_RX_CLOCK_SHIFT, 0);
348 }
349 if (ret < 0)
350 return ret;
351
352 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
353 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
354 ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
355 DP83822_RGMII_TX_CLOCK_SHIFT,
356 DP83822_RGMII_TX_CLOCK_SHIFT);
357 } else {
358 ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,
359 DP83822_RGMII_TX_CLOCK_SHIFT, 0);
360 }
361
362 return ret;
363 }
364
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c index f7a2ec150e54..971c8d6b85d2 100644 --- a/drivers/net/phy/dp83822.c +++ b/drivers/net/phy/dp83822.c @@ -72,6 +72,10 @@ #define DP83822_ANEG_ERR_INT_EN BIT(6) #define DP83822_EEE_ERROR_CHANGE_INT_EN BIT(7) +/* RCSR bits */ +#define DP83822_RGMII_RX_CLOCK_SHIFT BIT(12) +#define DP83822_RGMII_TX_CLOCK_SHIFT BIT(11) + /* INT_STAT1 bits */ #define DP83822_WOL_INT_EN BIT(4) #define DP83822_WOL_INT_STAT BIT(12) @@ -326,11 +330,36 @@ static irqreturn_t dp83822_handle_interrupt(struct phy_device *phydev) static int dp8382x_disable_wol(struct phy_device *phydev) { - int value = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN | - DP83822_WOL_SECURE_ON; + u16 val = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON; + + ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR, + MII_DP83822_WOL_CFG, val); + if (ret < 0) + return ret; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { + ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, + DP83822_RGMII_RX_CLOCK_SHIFT, + DP83822_RGMII_RX_CLOCK_SHIFT); + } else { + ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, + DP83822_RGMII_RX_CLOCK_SHIFT, 0); + } + if (ret < 0) + return ret; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { + ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, + DP83822_RGMII_TX_CLOCK_SHIFT, + DP83822_RGMII_TX_CLOCK_SHIFT); + } else { + ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR, + DP83822_RGMII_TX_CLOCK_SHIFT, 0); + } - return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, - MII_DP83822_WOL_CFG, value); + return ret; } static int dp83822_read_status(struct phy_device *phydev)
Add support for setting the internal clock shift of the PHY based on the interface requirements. RX/TX/both is supported for RGMII. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: David S. Miller <davem@davemloft.net> --- drivers/net/phy/dp83822.c | 37 +++++++++++++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 4 deletions(-)