| Message ID | CAD57uCfWrN8LgcfMVBmW_ssx-MJwRLzsBJt_-yfuqYo+3K-1Gg@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/gcc/testsuite/gcc.target/arm/pr65067.c b/gcc/testsuite/gcc.target/arm/pr65067.c index 9ddd7bb..05da294 100644 --- a/gcc/testsuite/gcc.target/arm/pr65067.c +++ b/gcc/testsuite/gcc.target/arm/pr65067.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-options "-mthumb -mcpu=cortex-m3 -O2" } */ struct tmp { diff --git a/gcc/testsuite/gcc.target/arm/pr65924.c b/gcc/testsuite/gcc.target/arm/pr65924.c index 746749f..e1ad394 100644 --- a/gcc/testsuite/gcc.target/arm/pr65924.c +++ b/gcc/testsuite/gcc.target/arm/pr65924.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-options "-O2 -mthumb" } */ int a, b, c;
Hi, This patch fixes two ARM testcases that require target to be Thumb2 effective. One is built for Cortex-m3, the purpose of the second one is to generate thumb2_addsi3_compare0_scratch insn and both are failing when compiled for armv5t for instance. Built and regtested, is it OK for trunk ? Thanks, Yvan 2015-05-04 Yvan Roux <yvan.roux@linaro.org> * gcc.target/arm/pr65067.c: Require Thumb2 effective target. * gcc.target/arm/pr65924.c: Likewise.